On Tue, Jul 25, 2017 at 07:34:46AM -0500, Segher Boessenkool wrote:
> Hi Mike,
>
> On Mon, Jul 24, 2017 at 07:40:26PM -0400, Michael Meissner wrote:
> > This patch eliminates the TARGET_UPPER_REGS_{DF,SF} macros. The next patch
> > will eliminate TARGET_UPPER_REGS_DI.
> >
> > I had to tune the optimization that turned load into FPR register and then
> > move
> > to Altivec register (and the store equivalent) because it used
> > TARGET_UPPER_REGS_<MODE> to protect SFmode on power7.
>
> > --- gcc/config/rs6000/rs6000.md (revision 250485)
> > +++ gcc/config/rs6000/rs6000.md (working copy)
> > @@ -691,7 +691,7 @@ (define_code_attr SMINMAX [(smin "SM
> > ;; D-form load to FPR register & move to Altivec register
> > ;; Move Altivec register to FPR register and store
> > (define_mode_iterator ALTIVEC_DFORM [DF
> > - SF
> > + (SF "TARGET_P8_VECTOR")
> > (DI "TARGET_POWERPC64")])
>
> Is that this part?
Yes.
> > --- gcc/config/rs6000/rs6000.c (revision 250485)
> > +++ gcc/config/rs6000/rs6000.c (working copy)
> > @@ -3216,22 +3216,12 @@ rs6000_init_hard_regno_mode_ok (bool glo
> > rs6000_constraints[RS6000_CONSTRAINT_wa] = VSX_REGS;
> > rs6000_constraints[RS6000_CONSTRAINT_wd] = VSX_REGS; /* V2DFmode */
> > rs6000_constraints[RS6000_CONSTRAINT_wf] = VSX_REGS; /* V4SFmode */
> > + rs6000_constraints[RS6000_CONSTRAINT_ws] = VSX_REGS; /* DFmode */
> > + rs6000_constraints[RS6000_CONSTRAINT_wv] = ALTIVEC_REGS; /*
> > DFmode */
> > + rs6000_constraints[RS6000_CONSTRAINT_wi] = VSX_REGS; /* DImode */
>
> After this all is done you can probably simplify the constraints a bit.
> Looking forward to it :-)
No, we can never remove constraints, since otherwise it would break user
written asm statements.
> > --- gcc/config/rs6000/rs6000.h (revision 250485)
> > +++ gcc/config/rs6000/rs6000.h (working copy)
> > @@ -575,9 +575,11 @@ extern int rs6000_vector_align[];
> > and/or SFmode could go in the traditional Altivec registers. GCC 8.x
> > deleted
> > these options. In order to simplify the code, define the options in
> > terms
> > of the base option (vsx, power8-vector). */
> > -#define TARGET_UPPER_REGS_DF TARGET_VSX
> > +#if (GCC_VERSION >= 3000)
> > +#pragma GCC poison TARGET_UPPER_REGS_DF TARGET_UPPER_REGS_SF
> > +#endif
>
> Why poison it? If someone accidentally slips in a new use it won't
> compile anyway.
>
> Okay for trunk with the poison removed. Thanks!
Ok. The second patch is in make check.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
