R. Diez wrote:
Issuing a generic memory barrier is workable, but it kills performance, as all variables will be reloaded again. Performance does matter when working on microcontrollers.
Could I ask for a reality check here. That sounds more like a cache flush, while a membar only ensures that any reordered reads and writes are disentangled: I'd not expect it to invalidate registers.
-- Mark Morgan Lloyd markMLl .AT. telemetry.co .DOT. uk [Opinions above are the author's, not those of his employers or colleagues] _______________________________________________ fpc-pascal maillist - fpc-pascal@lists.freepascal.org http://lists.freepascal.org/cgi-bin/mailman/listinfo/fpc-pascal
