You get illegal noise states from your hardware, causing illegal transitions in your logic.
For a solution look at page 13 of this document: http://www.avagotech.com/docs/AV02-0096EN j. On Sat, Mar 2, 2013 at 9:23 AM, Klemen Dovrtel <[email protected]>wrote: > Hello everybody, > > I am using fpga to monitor the incremental encoder and transfer the axis > absolute position to pc using parallel port and epp communication. When I > run the Axis GUI I am getting some strange following errors. I found out > that occasionally i get some bad axis position data transfer from the fpga. > But what is very strange that this happens only when the axis moves in > negative direction and never when it moves positive direction or stays > still (please see the image attached)). So i thought there must be some bug > in pfga encoder, not in epp communication, but i have no idea what could > possibly be wrong - the code is very simple (i pasted it below). > > I increase the servo-thread period, but the result was the same. I also > tried to locate a certain position of axis when the data is bad, and i > could not do this - it seems this is happening randomly. > > Does anybody have some idea where to look for the error? > > Regards, > Klemen > > > > > > ---------------------------------------------------------------------------------- > > library IEEE; > use IEEE.STD_LOGIC_1164.ALL; > --use IEEE.STD_LOGIC_ARITH.ALL; > use IEEE.STD_LOGIC_SIGNED.ALL; > > -- Uncomment the following library declaration if using > -- arithmetic functions with Signed or Unsigned values > --use IEEE.NUMERIC_STD.ALL; > > -- Uncomment the following library declaration if instantiating > -- any Xilinx primitives in this code. > --library UNISIM; > --use UNISIM.VComponents.all; > > > > entity QuadCounter is > Port ( clk : in std_logic; --system clock > QuadA : in std_logic; --first input from quadrature device > (i.e. optical disk encoder) > > QuadB : in std_logic; --second input from quadrature device (i.e. > optical disk encoder) > CounterValue : out std_logic_vector(31 downto 0); > ResetCounterValue : in std_logic > ); > end QuadCounter; > > architecture Behavioral of QuadCounter is > > signal Counter : std_logic_vector(31 downto 0) := (others => '0') ; > > -- previos quad signal > signal QuadAprevious : std_logic := '0'; > signal QuadBprevious : std_logic := '0'; > > > > signal state : std_logic_vector(3 downto 0) := "0000"; > -- ??initial > state, MUST be set, or "FF/Latch <state_1> (without init value) > has a constant value of 0 in block <QuadDecoder>. This FF/Latch > will be trimmed during the optimization process." > -- state deffinitons > constant Wait0 : std_logic_vector(3 downto 0) := "0000"; > constant CountUp0 : std_logic_vector(3 downto 0) := "0001"; > constant CountDown0 : std_logic_vector(3 downto 0) := "0010"; > constant Wait1 : std_logic_vector(3 downto 0) := "0101"; > constant CountUp1 : std_logic_vector(3 downto 0) := "0111"; > constant CountDown1 : std_logic_vector(3 downto 0) := "0100"; > constant Wait2 : std_logic_vector(3 downto 0) := > "1010"; > constant CountUp2 : std_logic_vector(3 downto 0) := "1000"; > constant CountDown2 : std_logic_vector(3 downto 0) := "1011"; > constant Wait3 : std_logic_vector(3 downto 0) := "1111"; > constant CountUp3 : std_logic_vector(3 downto 0) := "1110"; > constant CountDown3 : std_logic_vector(3 downto 0) := "1101"; > > begin > process(clk) > begin > if rising_edge(clk) then > state <= QuadAprevious & QuadBprevious & QuadA & QuadB; > > case state is > when > Wait0|Wait1|Wait2|Wait3 => > -- do nothing > when CountUp0|CountUp1|CountUp2|CountUp3 => > Counter <= Counter + 1; > when CountDown0|CountDown1|CountDown2|CountDown3 => > Counter <= Counter - 1; > when others => > -- ERROR > end case; --state > > > if (ResetCounterValue = '1') then > Counter <= (others => '0'); > end if; > > CounterValue <= Counter; > QuadAprevious <= QuadA; > QuadBprevious <= QuadB; > end if; > > end process; --(clk) > > end Behavioral; > > ------------------------------------------------------------------------------ > Everyone hates slow websites. So do we. > Make your web apps faster with AppDynamics > Download AppDynamics Lite for free today: > http://p.sf.net/sfu/appdyn_d2d_feb > _______________________________________________ > Emc-users mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/emc-users > > ------------------------------------------------------------------------------ Everyone hates slow websites. So do we. Make your web apps faster with AppDynamics Download AppDynamics Lite for free today: http://p.sf.net/sfu/appdyn_d2d_feb _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
