As result of recent re-design of the MSI/MSI-X interrupts enabling pattern this driver has to be updated to use the new technique to obtain a optimal number of MSI/MSI-X interrupts required.
Signed-off-by: Alexander Gordeev <[email protected]> --- drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 62 +++++++++++++---------- 1 files changed, 35 insertions(+), 27 deletions(-) diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index 9425bc6..e5fbbd3 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c @@ -5699,9 +5699,6 @@ static int enable_msix(struct adapter *adap) unsigned int nchan = adap->params.nports; struct msix_entry entries[MAX_INGQ + 1]; - for (i = 0; i < ARRAY_SIZE(entries); ++i) - entries[i].entry = i; - want = s->max_ethqsets + EXTRA_VECS; if (is_offload(adap)) { want += s->rdmaqs + s->ofldqsets; @@ -5710,34 +5707,45 @@ static int enable_msix(struct adapter *adap) } need = adap->params.nports + EXTRA_VECS + ofld_need; - while ((err = pci_enable_msix(adap->pdev, entries, want)) >= need) - want = err; + err = pci_msix_table_size(adap->pdev); + if (err < 0) + return err; - if (!err) { - /* - * Distribute available vectors to the various queue groups. - * Every group gets its minimum requirement and NIC gets top - * priority for leftovers. - */ - i = want - EXTRA_VECS - ofld_need; - if (i < s->max_ethqsets) { - s->max_ethqsets = i; - if (i < s->ethqsets) - reduce_ethqs(adap, i); - } - if (is_offload(adap)) { - i = want - EXTRA_VECS - s->max_ethqsets; - i -= ofld_need - nchan; - s->ofldqsets = (i / nchan) * nchan; /* round down */ - } - for (i = 0; i < want; ++i) - adap->msix_info[i].vec = entries[i].vector; - } else if (err > 0) { + want = min(want, err); + if (want < need) { dev_info(adap->pdev_dev, "only %d MSI-X vectors left, not using MSI-X\n", err); - err = -ENOSPC; + return -ENOSPC; } - return err; + + BUG_ON(want > ARRAY_SIZE(entries)); + for (i = 0; i < want; ++i) + entries[i].entry = i; + + err = pci_enable_msix(adap->pdev, entries, want); + if (err) + return err; + + /* + * Distribute available vectors to the various queue groups. + * Every group gets its minimum requirement and NIC gets top + * priority for leftovers. + */ + i = want - EXTRA_VECS - ofld_need; + if (i < s->max_ethqsets) { + s->max_ethqsets = i; + if (i < s->ethqsets) + reduce_ethqs(adap, i); + } + if (is_offload(adap)) { + i = want - EXTRA_VECS - s->max_ethqsets; + i -= ofld_need - nchan; + s->ofldqsets = (i / nchan) * nchan; /* round down */ + } + for (i = 0; i < want; ++i) + adap->msix_info[i].vec = entries[i].vector; + + return 0; } #undef EXTRA_VECS -- 1.7.7.6 ------------------------------------------------------------------------------ October Webinars: Code for Performance Free Intel webinars can help you accelerate application performance. Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from the latest Intel processors and coprocessors. See abstracts and register > http://pubads.g.doubleclick.net/gampad/clk?id=60134791&iu=/4140/ostg.clktrk _______________________________________________ E1000-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
