As result of recent re-design of the MSI/MSI-X interrupts enabling pattern this driver has to be updated to use the new technique to obtain a optimal number of MSI/MSI-X interrupts required.
Signed-off-by: Alexander Gordeev <[email protected]> --- drivers/scsi/hpsa.c | 28 +++++++++++++--------------- 1 files changed, 13 insertions(+), 15 deletions(-) diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c index 393c8db..eb17b3d 100644 --- a/drivers/scsi/hpsa.c +++ b/drivers/scsi/hpsa.c @@ -4103,34 +4103,32 @@ static void hpsa_interrupt_mode(struct ctlr_info *h) int err, i; struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; - for (i = 0; i < MAX_REPLY_QUEUES; i++) { - hpsa_msix_entries[i].vector = 0; - hpsa_msix_entries[i].entry = i; - } - /* Some boards advertise MSI but don't really support it */ if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) goto default_int_mode; if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { dev_info(&h->pdev->dev, "MSIX\n"); + + err = pci_msix_table_size(h->pdev); + if (err < ARRAY_SIZE(hpsa_msix_entries)) + goto default_int_mode; + + for (i = 0; i < ARRAY_SIZE(hpsa_msix_entries); i++) { + hpsa_msix_entries[i].vector = 0; + hpsa_msix_entries[i].entry = i; + } + err = pci_enable_msix(h->pdev, hpsa_msix_entries, - MAX_REPLY_QUEUES); + ARRAY_SIZE(hpsa_msix_entries)); if (!err) { for (i = 0; i < MAX_REPLY_QUEUES; i++) h->intr[i] = hpsa_msix_entries[i].vector; h->msix_vector = 1; return; } - if (err > 0) { - dev_warn(&h->pdev->dev, "only %d MSI-X vectors " - "available\n", err); - goto default_int_mode; - } else { - dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", - err); - goto default_int_mode; - } + dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err); + goto default_int_mode; } if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { dev_info(&h->pdev->dev, "MSI\n"); -- 1.7.7.6 ------------------------------------------------------------------------------ October Webinars: Code for Performance Free Intel webinars can help you accelerate application performance. Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from the latest Intel processors and coprocessors. See abstracts and register > http://pubads.g.doubleclick.net/gampad/clk?id=60134791&iu=/4140/ostg.clktrk _______________________________________________ E1000-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
