On 09/04/2025 17:47, Konrad Dybcio wrote:
SMEM allows the OS to retrieve information about the DDR memory.
Among that information, is a semi-magic value called 'HBB', or Highest
Bank address Bit, which multimedia drivers (for hardware like Adreno
and MDSS) must retrieve in order to program the IP blocks correctly.
This series introduces an API to retrieve that value, uses it in the
aforementioned programming sequences and exposes available DDR
frequencies in debugfs (to e.g. pass to aoss_qmp debugfs). More
information can be exposed in the future, as needed.
I know that for some platforms HBB differs between GPU and DPU (as it's
being programmed currently). Is there a way to check, which values are
we going to program:
- SM6115, SM6350, SM6375 (13 vs 14)
- SC8180X (15 vs 16)
- QCM2290 (14 vs 15)
Signed-off-by: Konrad Dybcio <konrad.dyb...@oss.qualcomm.com>
---
Konrad Dybcio (4):
soc: qcom: Expose DDR data from SMEM
drm/msm/a5xx: Get HBB dynamically, if available
drm/msm/a6xx: Get HBB dynamically, if available
drm/msm/mdss: Get HBB dynamically, if available
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 13 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 22 ++-
drivers/gpu/drm/msm/msm_mdss.c | 35 ++++-
drivers/soc/qcom/Makefile | 3 +-
drivers/soc/qcom/smem.c | 14 +-
drivers/soc/qcom/smem.h | 9 ++
drivers/soc/qcom/smem_dramc.c | 287 ++++++++++++++++++++++++++++++++++
include/linux/soc/qcom/smem.h | 4 +
8 files changed, 371 insertions(+), 16 deletions(-)
---
base-commit: 46086739de22d72319e37c37a134d32db52e1c5c
change-id: 20250409-topic-smem_dramc-6467187ac865
Best regards,
--
With best wishes
Dmitry
