<snip>
On Wed, Apr 28, 2021 at 12:48 PM Bruce Richardson
<bruce.richard...@intel.com<mailto:bruce.richard...@intel.com>> wrote:
<snip>
> I do not suggest pulling all these in. In our case, I see that the ask is
> only on LPM. I am open to hearing what others see as the requirement.
>
I think fib is the planned long-term replacement for lpm, and implements
the same algorithm, so I think first versions should use it.
If I may add my 2 cents. If a decision is made to implement any FIB/LPM logic
in testpmd, it would be great if a vector-only approach that is used in l3fwd
could be avoided.
While working on RISC-V port I had to disable l3fwd compilation for RISC-V as
it requires a vector engine (in l3fwd_em.c). The board I'm currently using has
rv64gc ISA which does not have vector extensions and I use testpmd extensively
for verification, hence it would be a shame to lose it.
[Honnappa] Sorry, I do not understand this. I see that vector code is under
compile time flag as below
#if defined RTE_ARCH_X86 || defined __ARM_NEON
l3fwd_em_send_packets(nb_rx, pkts_burst,
portid, qconf);
#else
l3fwd_em_no_opt_send_packets(nb_rx, pkts_burst,
portid, qconf);
#endif
