On Thu, 21 May 2026 08:42:21 GMT, Aleksey Shipilev <[email protected]> wrote:
>> It doesn't. AArch64 assembler throws an assertion if any field of an >> instruction is not set. I think it's because `Vm` may have to be <15, so >> that bi twill be clear. But the comment is more confusing than helpful. > > Still confused on correctness here, bear with me for a sec. > > So current code means we set bit 20 implicitly to `0`, when `Ts == H`, > because it implies `Vm < 16`. But with `H` variant, don't we need to encode > lane bits as H:L:M explicitly? Meaning, `M` is the lower bit of the lane, > shouldn't it be dependent on `lane`, rather than being always `0`? > > Actually, a few lines above, when `size == 0b01`, we do not take the lower > bit out of `lane` at all? That's our `M`? I leave it like that for now. ------------- PR Review Comment: https://git.openjdk.org/jdk/pull/30941#discussion_r3288557404
