pussuw commented on code in PR #16344: URL: https://github.com/apache/nuttx/pull/16344#discussion_r2081402863
########## arch/arm/src/armv7-a/arm_addrenv.c: ########## @@ -238,14 +182,27 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize, memset(addrenv, 0, sizeof(arch_addrenv_t)); + tablesize = PGTABLE_SIZE * sizeof(uintptr_t); + addrenv->l1table = kmm_memalign(tablesize, tablesize); Review Comment: Ok so there is an alignment requirement for the l1 table of 16K: ` The base address of the L1 translation table is known as the Translation Table Base Address and is held in CP15 c2. It must be aligned to a 16KB boundary. The Translation table locations are defined by the Translation Table Base Registers (TTRB0 and TTRB1). ` Sorry, I did not know this. You are right, mm_pgalloc ensures that the page is page aligned. There is no good way to fix this so your solution of allocating L1 table from heap is the best. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: commits-unsubscr...@nuttx.apache.org For queries about this service, please contact Infrastructure at: us...@infra.apache.org
