chandlerc created this revision.
chandlerc added reviewers: rsmith, mehdi_amini.
chandlerc added a subscriber: cfe-commits.
Herald added a subscriber: mcrosier.
Much to my surprise, '-disable-llvm-optzns' which I thought was the
magical flag I wanted to get at the raw LLVM IR coming out of Clang
deosn't do that. It still runs some passes over the IR. I don't want
that, I really want the *raw* IR coming out of Clang and I strongly
suspect everyone else using it is in the same camp.
I've not talked to anyone debugging Clang and LLVM interactions that
needed these different flags so I'd like to remove the less widely known
one (I think) and consolidate on a simple, strong model for the one flag
left.
This is part of simplifying how Clang drives LLVM to make it cleaner to
wire up to the new pass manager.
https://reviews.llvm.org/D28047
Files:
include/clang/Driver/CC1Options.td
include/clang/Frontend/CodeGenOptions.def
lib/CodeGen/BackendUtil.cpp
lib/Driver/Tools.cpp
lib/Frontend/CompilerInvocation.cpp
test/CodeGen/debug-info-scope.c
test/CodeGen/sanitize-address-field-padding.cpp
test/CodeGenCUDA/convergent.cu
test/CodeGenCUDA/fp-contract.cu
test/CodeGenCUDA/link-device-bitcode.cu
test/CodeGenCUDA/nothrow.cu
test/CodeGenCXX/alias-available-externally.cpp
test/CodeGenCoroutines/coro-alloc.cpp
test/CodeGenCoroutines/coro-builtins.c
test/CodeGenCoroutines/microsoft-abi-operator-coawait.cpp
test/CodeGenObjC/arc-linetable.m
test/Driver/save-temps.c
Index: test/Driver/save-temps.c
===================================================================
--- test/Driver/save-temps.c
+++ test/Driver/save-temps.c
@@ -2,7 +2,7 @@
// RUN: | FileCheck %s
// CHECK: "-o" "save-temps.i"
// CHECK: "-emit-llvm-uselists"
-// CHECK: "-disable-llvm-passes"
+// CHECK: "-disable-llvm-optzns"
// CHECK: "-o" "save-temps.bc"
// CHECK: "-o" "save-temps.s"
// CHECK: "-o" "save-temps.o"
@@ -14,7 +14,7 @@
// RUN: | FileCheck %s -check-prefix=CWD
// CWD: "-o" "save-temps.i"
// CWD: "-emit-llvm-uselists"
-// CWD: "-disable-llvm-passes"
+// CWD: "-disable-llvm-optzns"
// CWD: "-o" "save-temps.bc"
// CWD: "-o" "save-temps.s"
// CWD: "-o" "save-temps.o"
@@ -63,16 +63,16 @@
// RUN: %clang -target x86_64-apple-darwin -save-temps=obj -o obj/dir/a.out -arch x86_64 %s -### 2>&1 \
// RUN: | FileCheck %s -check-prefix=CHECK-OBJ
// CHECK-OBJ: "-o" "obj/dir{{/|\\\\}}save-temps.i"
-// CHECK-OBJ: "-disable-llvm-passes"
+// CHECK-OBJ: "-disable-llvm-optzns"
// CHECK-OBJ: "-o" "obj/dir{{/|\\\\}}save-temps.bc"
// CHECK-OBJ: "-o" "obj/dir{{/|\\\\}}save-temps.s"
// CHECK-OBJ: "-o" "obj/dir{{/|\\\\}}save-temps.o"
// CHECK-OBJ: "-o" "obj/dir{{/|\\\\}}a.out"
//
// RUN: %clang -target x86_64-apple-darwin -save-temps=obj -arch x86_64 %s -### 2>&1 \
// RUN: | FileCheck %s -check-prefix=CHECK-OBJ-NOO
// CHECK-OBJ-NOO: "-o" "save-temps.i"
-// CHECK-OBJ-NOO: "-disable-llvm-passes"
+// CHECK-OBJ-NOO: "-disable-llvm-optzns"
// CHECK-OBJ-NOO: "-o" "save-temps.bc"
// CHECK-OBJ-NOO: "-o" "save-temps.s"
// CHECK-OBJ-NOO: "-o" "save-temps.o"
Index: test/CodeGenObjC/arc-linetable.m
===================================================================
--- test/CodeGenObjC/arc-linetable.m
+++ test/CodeGenObjC/arc-linetable.m
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -emit-llvm -fblocks -fobjc-arc -debug-info-kind=standalone -dwarf-version=4 -disable-llvm-passes -triple x86_64-apple-darwin10 %s -o - | FileCheck %s
+// RUN: %clang_cc1 -emit-llvm -fblocks -fobjc-arc -debug-info-kind=standalone -dwarf-version=4 -disable-llvm-optzns -triple x86_64-apple-darwin10 %s -o - | FileCheck %s
// Legend: EXP = Return expression, RET = ret instruction
Index: test/CodeGenCoroutines/microsoft-abi-operator-coawait.cpp
===================================================================
--- test/CodeGenCoroutines/microsoft-abi-operator-coawait.cpp
+++ test/CodeGenCoroutines/microsoft-abi-operator-coawait.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple x86_64-pc-windows-msvc18.0.0 -fcoroutines-ts -emit-llvm %s -o - -std=c++14 -disable-llvm-passes | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-pc-windows-msvc18.0.0 -fcoroutines-ts -emit-llvm %s -o - -std=c++14 -disable-llvm-optzns | FileCheck %s
struct no_suspend {
bool await_ready() { return true; }
template <typename F> void await_suspend(F) {}
Index: test/CodeGenCoroutines/coro-builtins.c
===================================================================
--- test/CodeGenCoroutines/coro-builtins.c
+++ test/CodeGenCoroutines/coro-builtins.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple x86_64-pc-windows-msvc18.0.0 -fcoroutines-ts -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-pc-windows-msvc18.0.0 -fcoroutines-ts -emit-llvm %s -o - -disable-llvm-optzns | FileCheck %s
void *myAlloc(long long);
Index: test/CodeGenCoroutines/coro-alloc.cpp
===================================================================
--- test/CodeGenCoroutines/coro-alloc.cpp
+++ test/CodeGenCoroutines/coro-alloc.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 -emit-llvm %s -o - -disable-llvm-optzns | FileCheck %s
namespace std {
namespace experimental {
Index: test/CodeGenCXX/alias-available-externally.cpp
===================================================================
--- test/CodeGenCXX/alias-available-externally.cpp
+++ test/CodeGenCXX/alias-available-externally.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -O1 -std=c++11 -emit-llvm -triple %itanium_abi_triple -disable-llvm-passes -o - %s | FileCheck %s
+// RUN: %clang_cc1 -O1 -std=c++11 -emit-llvm -triple %itanium_abi_triple -disable-llvm-optzns -o - %s | FileCheck %s
// Clang should not generate alias to available_externally definitions.
// Check that the destructor of Foo is defined.
// The destructors have different return type for different targets.
Index: test/CodeGenCUDA/nothrow.cu
===================================================================
--- test/CodeGenCUDA/nothrow.cu
+++ test/CodeGenCUDA/nothrow.cu
@@ -1,9 +1,9 @@
// RUN: %clang_cc1 -std=c++11 -fcxx-exceptions -fexceptions -fcuda-is-device \
-// RUN: -triple nvptx-nvidia-cuda -emit-llvm -disable-llvm-passes -o - %s | \
+// RUN: -triple nvptx-nvidia-cuda -emit-llvm -disable-llvm-optzns -o - %s | \
// RUN: FileCheck -check-prefix DEVICE %s
// RUN: %clang_cc1 -std=c++11 -fcxx-exceptions -fexceptions \
-// RUN: -triple x86_64-unknown-linux-gnu -emit-llvm -disable-llvm-passes -o - %s | \
+// RUN: -triple x86_64-unknown-linux-gnu -emit-llvm -disable-llvm-optzns -o - %s | \
// RUN: FileCheck -check-prefix HOST %s
#include "Inputs/cuda.h"
Index: test/CodeGenCUDA/link-device-bitcode.cu
===================================================================
--- test/CodeGenCUDA/link-device-bitcode.cu
+++ test/CodeGenCUDA/link-device-bitcode.cu
@@ -5,27 +5,27 @@
//
// Prepare bitcode file to link with
// RUN: %clang_cc1 -triple nvptx-unknown-cuda -emit-llvm-bc \
-// RUN: -disable-llvm-passes -o %t.bc %S/Inputs/device-code.ll
+// RUN: -disable-llvm-optzns -o %t.bc %S/Inputs/device-code.ll
// RUN: %clang_cc1 -triple nvptx-unknown-cuda -emit-llvm-bc \
-// RUN: -disable-llvm-passes -o %t-2.bc %S/Inputs/device-code-2.ll
+// RUN: -disable-llvm-optzns -o %t-2.bc %S/Inputs/device-code-2.ll
//
// Make sure function in device-code gets linked in and internalized.
// RUN: %clang_cc1 -triple nvptx-unknown-cuda -fcuda-is-device \
// RUN: -mlink-cuda-bitcode %t.bc -emit-llvm \
-// RUN: -disable-llvm-passes -o - %s \
+// RUN: -disable-llvm-optzns -o - %s \
// RUN: | FileCheck %s -check-prefix CHECK-IR
//
// Make sure we can link two bitcode files.
// RUN: %clang_cc1 -triple nvptx-unknown-cuda -fcuda-is-device \
// RUN: -mlink-cuda-bitcode %t.bc -mlink-cuda-bitcode %t-2.bc \
-// RUN: -emit-llvm -disable-llvm-passes -o - %s \
+// RUN: -emit-llvm -disable-llvm-optzns -o - %s \
// RUN: | FileCheck %s -check-prefix CHECK-IR -check-prefix CHECK-IR-2
//
// Make sure function in device-code gets linked but is not internalized
// without -fcuda-uses-libdevice
// RUN: %clang_cc1 -triple nvptx-unknown-cuda -fcuda-is-device \
// RUN: -mlink-bitcode-file %t.bc -emit-llvm \
-// RUN: -disable-llvm-passes -o - %s \
+// RUN: -disable-llvm-optzns -o - %s \
// RUN: | FileCheck %s -check-prefix CHECK-IR-NLD
//
// Make sure NVVMReflect pass is enabled in NVPTX back-end.
Index: test/CodeGenCUDA/fp-contract.cu
===================================================================
--- test/CodeGenCUDA/fp-contract.cu
+++ test/CodeGenCUDA/fp-contract.cu
@@ -3,21 +3,21 @@
// By default we should fuse multiply/add into fma instruction.
// RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -S \
-// RUN: -disable-llvm-passes -o - %s | FileCheck -check-prefix ENABLED %s
+// RUN: -disable-llvm-optzns -o - %s | FileCheck -check-prefix ENABLED %s
// Explicit -ffp-contract=fast
// RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -S \
-// RUN: -ffp-contract=fast -disable-llvm-passes -o - %s \
+// RUN: -ffp-contract=fast -disable-llvm-optzns -o - %s \
// RUN: | FileCheck -check-prefix ENABLED %s
// Explicit -ffp-contract=on -- fusing by front-end (disabled).
// RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -S \
-// RUN: -ffp-contract=on -disable-llvm-passes -o - %s \
+// RUN: -ffp-contract=on -disable-llvm-optzns -o - %s \
// RUN: | FileCheck -check-prefix DISABLED %s
// Explicit -ffp-contract=off should disable instruction fusing.
// RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -S \
-// RUN: -ffp-contract=off -disable-llvm-passes -o - %s \
+// RUN: -ffp-contract=off -disable-llvm-optzns -o - %s \
// RUN: | FileCheck -check-prefix DISABLED %s
Index: test/CodeGenCUDA/convergent.cu
===================================================================
--- test/CodeGenCUDA/convergent.cu
+++ test/CodeGenCUDA/convergent.cu
@@ -2,10 +2,10 @@
// REQUIRES: nvptx-registered-target
// RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -emit-llvm \
-// RUN: -disable-llvm-passes -o - %s | FileCheck -check-prefix DEVICE %s
+// RUN: -disable-llvm-optzns -o - %s | FileCheck -check-prefix DEVICE %s
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm \
-// RUN: -disable-llvm-passes -o - %s | \
+// RUN: -disable-llvm-optzns -o - %s | \
// RUN: FileCheck -check-prefix HOST %s
#include "Inputs/cuda.h"
Index: test/CodeGen/sanitize-address-field-padding.cpp
===================================================================
--- test/CodeGen/sanitize-address-field-padding.cpp
+++ test/CodeGen/sanitize-address-field-padding.cpp
@@ -5,8 +5,8 @@
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -fsanitize=address -fsanitize-address-field-padding=1 -fsanitize-blacklist=%t.type.blacklist -Rsanitize-address -emit-llvm -o - %s -O1 -mconstructor-aliases 2>&1 | FileCheck %s --check-prefix=WITH_CTOR_ALIASES
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -fsanitize=address -fsanitize-address-field-padding=1 -fsanitize-blacklist=%t.file.blacklist -Rsanitize-address -emit-llvm -o - %s 2>&1 | FileCheck %s --check-prefix=FILE_BLACKLIST
// RUN: %clang_cc1 -fsanitize=address -emit-llvm -o - %s 2>&1 | FileCheck %s --check-prefix=NO_PADDING
-// Try to emulate -save-temps option and make sure -disable-llvm-passes will not run sanitize instrumentation.
-// RUN: %clang_cc1 -fsanitize=address -emit-llvm -disable-llvm-passes -o - %s | %clang_cc1 -fsanitize=address -emit-llvm -o - -x ir | FileCheck %s --check-prefix=NO_PADDING
+// Try to emulate -save-temps option and make sure -disable-llvm-optzns will not run sanitize instrumentation.
+// RUN: %clang_cc1 -fsanitize=address -emit-llvm -disable-llvm-optzns -o - %s | %clang_cc1 -fsanitize=address -emit-llvm -o - -x ir | FileCheck %s --check-prefix=NO_PADDING
//
// The reasons to ignore a particular class are not set in stone and will change.
Index: test/CodeGen/debug-info-scope.c
===================================================================
--- test/CodeGen/debug-info-scope.c
+++ test/CodeGen/debug-info-scope.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -dwarf-version=4 -debug-info-kind=limited -disable-llvm-passes -emit-llvm < %s | FileCheck %s
-// RUN: %clang_cc1 -dwarf-version=4 -debug-info-kind=line-tables-only -disable-llvm-passes -emit-llvm < %s | FileCheck --check-prefix=GMLT %s
+// RUN: %clang_cc1 -dwarf-version=4 -debug-info-kind=limited -disable-llvm-optzns -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -dwarf-version=4 -debug-info-kind=line-tables-only -disable-llvm-optzns -emit-llvm < %s | FileCheck --check-prefix=GMLT %s
// Two variables with same name in separate scope.
// Radar 8330217.
int main() {
Index: lib/Frontend/CompilerInvocation.cpp
===================================================================
--- lib/Frontend/CompilerInvocation.cpp
+++ lib/Frontend/CompilerInvocation.cpp
@@ -514,7 +514,6 @@
Opts.EmitLLVMUseLists = A->getOption().getID() == OPT_emit_llvm_uselists;
Opts.DisableLLVMOpts = Args.hasArg(OPT_disable_llvm_optzns);
- Opts.DisableLLVMPasses = Args.hasArg(OPT_disable_llvm_passes);
Opts.DisableRedZone = Args.hasArg(OPT_disable_red_zone);
Opts.ForbidGuardVariables = Args.hasArg(OPT_fforbid_guard_variables);
Opts.UseRegisterSizedBitfieldAccess = Args.hasArg(
Index: lib/Driver/Tools.cpp
===================================================================
--- lib/Driver/Tools.cpp
+++ lib/Driver/Tools.cpp
@@ -6392,16 +6392,16 @@
}
// With -save-temps, we want to save the unoptimized bitcode output from the
- // CompileJobAction, use -disable-llvm-passes to get pristine IR generated
+ // CompileJobAction, use -disable-llvm-optzns to get pristine IR generated
// by the frontend.
// When -fembed-bitcode is enabled, optimized bitcode is emitted because it
// has slightly different breakdown between stages.
// FIXME: -fembed-bitcode -save-temps will save optimized bitcode instead of
// pristine IR generated by the frontend. Ideally, a new compile action should
// be added so both IR can be captured.
if (C.getDriver().isSaveTempsEnabled() &&
!C.getDriver().embedBitcodeInObject() && isa<CompileJobAction>(JA))
- CmdArgs.push_back("-disable-llvm-passes");
+ CmdArgs.push_back("-disable-llvm-optzns");
if (Output.getType() == types::TY_Dependencies) {
// Handled with other dependency code.
Index: lib/CodeGen/BackendUtil.cpp
===================================================================
--- lib/CodeGen/BackendUtil.cpp
+++ lib/CodeGen/BackendUtil.cpp
@@ -284,19 +284,14 @@
void EmitAssemblyHelper::CreatePasses(legacy::PassManager &MPM,
legacy::FunctionPassManager &FPM) {
- if (CodeGenOpts.DisableLLVMPasses)
+ // Handle disabling of LLVM optimization, where we want to preserve the
+ // internal module before any optimization.
+ if (CodeGenOpts.DisableLLVMOpts)
return;
unsigned OptLevel = CodeGenOpts.OptimizationLevel;
CodeGenOptions::InliningMethod Inlining = CodeGenOpts.getInlining();
- // Handle disabling of LLVM optimization, where we want to preserve the
- // internal module before any optimization.
- if (CodeGenOpts.DisableLLVMOpts) {
- OptLevel = 0;
- Inlining = CodeGenOpts.NoInlining;
- }
-
PassManagerBuilderWrapper PMBuilder(CodeGenOpts, LangOpts);
// Figure out TargetLibraryInfo. This needs to be added to MPM and FPM
Index: include/clang/Frontend/CodeGenOptions.def
===================================================================
--- include/clang/Frontend/CodeGenOptions.def
+++ include/clang/Frontend/CodeGenOptions.def
@@ -53,9 +53,6 @@
///< getting .bc files that correspond to the
///< internal state before optimizations are
///< done.
-CODEGENOPT(DisableLLVMPasses , 1, 0) ///< Don't run any LLVM IR passes to get
- ///< the pristine IR generated by the
- ///< frontend.
CODEGENOPT(DisableRedZone , 1, 0) ///< Set when -mno-red-zone is enabled.
CODEGENOPT(DisableTailCalls , 1, 0) ///< Do not emit tail calls.
CODEGENOPT(EmitDeclMetadata , 1, 0) ///< Emit special metadata indicating what
Index: include/clang/Driver/CC1Options.td
===================================================================
--- include/clang/Driver/CC1Options.td
+++ include/clang/Driver/CC1Options.td
@@ -161,12 +161,9 @@
}
def disable_llvm_optzns : Flag<["-"], "disable-llvm-optzns">,
- HelpText<"Don't run LLVM optimization passes">;
+ HelpText<"Don't run LLVM passes prior to emitting IR or bitcode">;
def disable_llvm_verifier : Flag<["-"], "disable-llvm-verifier">,
HelpText<"Don't run the LLVM IR verifier pass">;
-def disable_llvm_passes : Flag<["-"], "disable-llvm-passes">,
- HelpText<"Use together with -emit-llvm to get pristine LLVM IR from the "
- "frontend by not running any LLVM passes at all">;
def disable_red_zone : Flag<["-"], "disable-red-zone">,
HelpText<"Do not emit code that uses the red zone.">;
def dwarf_column_info : Flag<["-"], "dwarf-column-info">,
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