Re: Core memory emulator using non volatile ram.

[Guy Sotomayor Jr via cctalk]

> On Dec 16, 2018, at 10:40 PM, Chuck Guzis via cctalk <cctalk@classiccmp.org> 
> wrote:
> 
> On 12/16/18 11:21 AM, Paul Koning wrote:
> 
>> If you simply want non-volatile memory, the obvious answer is SRAM with 
>> battery backup and a small FPGA to do the interfacing.
> 
> I proposed nvRAM - CMOS SRAM backed by cell-for-cell flash.  Loads SRAM
> from flash on power-up and stores into flash at power-down.  All that's
> needed is a capacitor to extend the power-down cycle a bit.
> 
> Very fast, available in 8 to 32-bit wide architectures, up to 16Mbit per
> package.
> 
> Claims to be guaranteed for 1M power cycles and doesn't require a battery.

Except it is *much* more expensive than MRAM.  32x8 NVSRAM is $18.50 in qty 1 
from Digikey.
A 64Kx16 MRAM is $11.84 in qty 1 from Digikey.  MRAM requires no additional 
circuitry so that
also reduces the overall cost (and has unlimited write endurance).

If it sounds like I’m harping on MRAM, maybe I am.  I’ve looked at the various 
technologies in
detail (what’s available, cost, interfacing, etc, etc) for years and for 
anything that requires
non-volatility, MRAM wins until you get into seriously large sizes at which 
point you need to
go to FLASH for economics.

TTFN - Guy