If you want the real deal you can always make a driver out of a bunch of H-bridge ICs and an old core plane. I'll skip suggesting you weave your own core...
On Sat, Dec 15, 2018, 2:01 PM systems_glitch via cctalk < cctalk@classiccmp.org wrote: > Chuck, > > FRAM is destructive read on the die, from what I understand. It's just that > the onboard controller takes care of it for you, much like a core > subsystem. > > Thanks, > Jonathan > > On Sat, Dec 15, 2018 at 1:55 PM Chuck Guzis via cctalk < > cctalk@classiccmp.org> wrote: > > > On 12/15/18 10:01 AM, Guy Sotomayor Jr via cctalk wrote: > > > FRAM or MRAM. I make extensive use of them in my projects. > > > > > > Everspin has a few (all SMT and 3.3v). As I recall they run ~$20/ea > for > > 4Mb (512K x 8 or 256K x 16). > > > > As neither MRAM nor FRAM requires a write-after-read refresh, I fail to > > see the "realism" in this that couldn't be satisfied with simple > > battery-backed RAM or even flash-backed RAM. > > > > Yes, MRAM is magnetic, but ti's not the same principle as real core. > > > > FWIW, > > Chuck > > > > >
