Here's a tickler for the list... I've used bit-addressable machines, where individual bits were directly addressed without regard to their position within a byte or word. E.g., a system with 48 bit addresses, where the lower 3 bits of an address specified the bit within a byte; the next 3 specified the address of a byte within a (64 bit) word, and so on. Bit vectors were an important part of the architecture.
What perplexed me is that the address of 0000 0 0 specified the first bit in byte 0 of word 0, but that same bit was the *high order* bit in the corresponding byte and word. It would seem to make more sense reversing the significance of bits in a byte and bytes in a word such that the lowest-numbered addresses corresponded to the least-significant bits in a word or byte. Call it "extreme little endianess". Does anyone know of such an architecture? --Chuck