From: Eric Smith Sent: Saturday, December 10, 2016 6:38 PM > On Fri, Dec 9, 2016 at 12:47 PM, Rich Alderson <ri...@livingcomputers.org> > wrote:
>> [1] For non-PDP10 programmers: The original architecture of the PDP-6 >> and PDP-10 used an 18-bit (256KW) address space. The KI-10 >> processor added a 22-bit pager and a concept of sections to the >> hardware. > As you say, the KI10 had 22-bit physical memory addressing, almost > identical to the "KI paging" of the later Model A KL10. There were two > PTEs per 36-bit word in the page table, with the five of the 18 bits > being the APWSX properties, and the remaining 13 being a physical page > number. The 13-bit physical page number was concatenated with the > offset into the 512-word page (low 9 bits of the virtual address) to > get the 22-bit physical address. > However, the KI10 did not have any "sections". Sections were introduced > with the Extended ("Model B", "KL paging") KL10. I knew that was wrong just as soon as I had hit "Send", but I also knew that I could count on one of the PDP-10 subgroup to fix that. Thanks! Rich Rich Alderson Vintage Computing Sr. Systems Engineer Living Computer Museum 2245 1st Avenue S Seattle, WA 98134 mailto:ri...@livingcomputermuseum.org http://www.LivingComputerMuseum.org/