On 23.07.2019 17:48, Roger Pau Monne wrote: > Current code only prevent mapping the lapic page into the guest > physical memory map. Expand the range to be 0xFEEx_xxxx as described > in the Intel VTd specification section 3.13 "Handling Requests to > Interrupt Address Range". > > AMD also lists this address range in the AMD SR5690 Databook, section > 2.4.4 "MSI Interrupt Handling and MSI to HT Interrupt Conversion". > > Requested-by: Andrew Cooper <andrew.coop...@citrix.com> > Signed-off-by: Roger Pau Monné <roger....@citrix.com>
I've committed this on the basis that it shouldn't hurt, but having thought about this some more I'm not really sure I see the point: The IOMMU special cases accesses into this range anyway, to redirect lookup to the interrupt remapping table instead of the DMA remapping one. Hence any mappings inserted into this range are simply useless, but shouldn't otherwise hurt. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
