On 08.08.2025 22:23, Andrew Cooper wrote: > Of note, CR4.FRED is bit 32 and cannot enabled outside of 64bit mode. > > Most supported toolchains don't understand the FRED instructions yet. ERETU > and ERETS are easy to wrap (they encoded as REPZ/REPNE CLAC), while LKGS is > more complicated and deferred for now. > > I have intentionally named the FRED MSRs differently to the spec. In the > spec, the stack pointer names alias the TSS fields of the same name, despite > very different semantics. > > Signed-off-by: Andrew Cooper <andrew.coop...@citrix.com>
Acked-by: Jan Beulich <jbeul...@suse.com> with ... > --- a/xen/arch/x86/Kconfig > +++ b/xen/arch/x86/Kconfig > @@ -57,6 +57,10 @@ config HAS_CC_CET_IBT > # Retpoline check to work around > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654 > def_bool $(cc-option,-fcf-protection=branch -mmanual-endbr > -mindirect-branch=thunk-extern) && $(as-instr,endbr64) > > +config HAS_AS_FRED > + # binutils >= 2.41 or LLVM >= 19 > + def_bool $(as-instr,eretu;lkgs %ax) ..., as per your reply, this preferably dropped (without me insisting), and with ... > --- a/xen/arch/x86/include/asm/x86-defns.h > +++ b/xen/arch/x86/include/asm/x86-defns.h > @@ -75,6 +75,7 @@ > #define X86_CR4_PKE 0x00400000 /* enable PKE */ > #define X86_CR4_CET 0x00800000 /* Control-flow Enforcement Technology > */ > #define X86_CR4_PKS 0x01000000 /* Protection Key Supervisor */ > +#define X86_CR4_FRED 0x100000000 /* Fast Return and Event Delivery */ ... a UL suffix added here for Misra. > --- a/xen/include/public/arch-x86/cpufeatureset.h > +++ b/xen/include/public/arch-x86/cpufeatureset.h > @@ -310,7 +310,10 @@ XEN_CPUFEATURE(ARCH_PERF_MON, 10*32+8) /* > Architectural Perfmon */ > XEN_CPUFEATURE(FZRM, 10*32+10) /*A Fast Zero-length REP MOVSB */ > XEN_CPUFEATURE(FSRS, 10*32+11) /*A Fast Short REP STOSB */ > XEN_CPUFEATURE(FSRCS, 10*32+12) /*A Fast Short REP CMPSB/SCASB */ > +XEN_CPUFEATURE(FRED, 10*32+17) /* Fast Return and Event Delivery */ > +XEN_CPUFEATURE(LKGS, 10*32+18) /* Load Kernel GS instruction */ > XEN_CPUFEATURE(WRMSRNS, 10*32+19) /*S WRMSR Non-Serialising */ > +XEN_CPUFEATURE(NMI_SRC, 10*32+20) /* NMI-Source Reporting */ > XEN_CPUFEATURE(AMX_FP16, 10*32+21) /* AMX FP16 instruction */ > XEN_CPUFEATURE(AVX_IFMA, 10*32+23) /*A AVX-IFMA Instructions */ > XEN_CPUFEATURE(LAM, 10*32+26) /* Linear Address Masking */ I'd like to note that we could long have had this if my long-pending emulator patch had gone in at some point. Jan
