On 09.04.2025 10:53, Jan Beulich wrote: > On 07.04.2025 11:10, Teddy Astie wrote: >> --- a/xen/include/public/arch-x86/cpufeatureset.h >> +++ b/xen/include/public/arch-x86/cpufeatureset.h >> @@ -170,6 +170,7 @@ XEN_CPUFEATURE(SKINIT, 3*32+12) /* SKINIT/STGI >> instructions */ >> XEN_CPUFEATURE(WDT, 3*32+13) /* Watchdog timer */ >> XEN_CPUFEATURE(LWP, 3*32+15) /* Light Weight Profiling */ >> XEN_CPUFEATURE(FMA4, 3*32+16) /*A 4 operands MAC instructions */ >> +XEN_CPUFEATURE(TCE, 3*32+17) /*H Translation Cache Extension >> support */ > > I consider this too limiting; this is a performance hint only, after all, > not affecting correctness when ignored if set. A shadow guest is fine to > enable TCE if it sees fit. It'll benefit if later migrated to a HAP- > capable host.
Further to this: From all I can find it doesn't become clear whether INVLPGA acts like INVLPG as to upper-level entries. Implicitly it comes closer to acting like INVLPG with TCE set. Which may be the reason why svm_invlpg() doesn't use INVLPGA. Yet that could change then for guests having TCE set, which means it would become relevant to expose the bit also to shadow guests. Jan
