Hello Marc,
Marc Zyngier <m...@kernel.org> writes: > Volodymyr, > > On Fri, 22 Sep 2023 01:22:11 +0100, > Volodymyr Babchuk <volodymyr_babc...@epam.com> wrote: >> >> >> Hi Mark, > > s/k/c/ Oh, I'm sorry. >> >> I am writing to you, because you are GICv3 maintainer in Linux. We are >> updating ITS driver in Xen and we have a question about cache >> maintenance WRT memory shared with ITS. As I can see, the Linux ITS >> driver uses gic_flush_dcache_to_poc() all over the code. This boils down >> to "dc civac" instruction which does both clean and invalidate. But do >> we really need to invalidate a cache when we are sending an ITS command? >> In my understanding it is sufficient to clean a cache only and Linux >> uses clean&invalidate just out of convenience. Is this correct? > > It really depends how you look at it. We use DC CIVA as the standard > way to give a buffer to a device, as that's what the DMA API > does. Switching to a simple clean is possible, but I don't really see > what it brings you. > > ITS commands are usually written as a single command followed by a > SYNC/VSYNC. That's a total a 8 64bit words, which makes a cache line > on 99.999% of the implementations. > > What do you gain by keeping the cache line around? Not much. By the > time you go around the command queue and need the same data again, it > will have been evicted from your L1 already. This is a great point. Thank you. -- WBR, Volodymyr
