Hi Mark,
I am writing to you, because you are GICv3 maintainer in Linux. We are updating ITS driver in Xen and we have a question about cache maintenance WRT memory shared with ITS. As I can see, the Linux ITS driver uses gic_flush_dcache_to_poc() all over the code. This boils down to "dc civac" instruction which does both clean and invalidate. But do we really need to invalidate a cache when we are sending an ITS command? In my understanding it is sufficient to clean a cache only and Linux uses clean&invalidate just out of convenience. Is this correct? Below you can find our discussion about this. Julien Grall <jul...@xen.org> writes: > On 19/09/2023 15:36, Volodymyr Babchuk wrote: >> Julien Grall <jul...@xen.org> writes: >>> On 19/09/2023 12:28, Volodymyr Babchuk wrote: >>>> There is no need to invalidate cache entry because we just wrote into a >>>> memory region. Writing itself guarantees that cache entry is valid. >>> >>> The goal of invalidate is to remove the line from the cache. So I >>> don't quite understand the reasoning here. >>> >> Well, I may be wrong, but what is the goal in removing line from the >> cache? As I see this, we want to be sure that ITS sees data written in >> the memory, so we should flush a cache line. But why do we need to >> remove it from CPU's cache? > > I don't exactly know. From a brief look I agree with you. However, our > driver is based on Linux where the clean & invalidate is also used. So > I am a little be cautious to remove it. > > The way forward would be to ask the Marc Zyngier (GICv3 maintainer) > why it was added in Linux. Then we can decide whether this can be > removed in Xen. > > Cheers, -- WBR, Volodymyr
