If a counter happend overflow just clear corresponding bit of
IA32_PERF_GLOBAL_OVF_CTRL, rather than clear all the bit of this msr.
Signed-off-by: Luwei Kang <luwei.k...@intel.com>
---
xen/arch/x86/cpu/vpmu_intel.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c
index e8049ed..613aafe 100644
--- a/xen/arch/x86/cpu/vpmu_intel.c
+++ b/xen/arch/x86/cpu/vpmu_intel.c
@@ -868,7 +868,7 @@ static int core2_vpmu_do_interrupt(struct cpu_user_regs
*regs)
if ( is_pmc_quirk )
handle_pmc_quirk(msr_content);
core2_vpmu_cxt->global_status |= msr_content;
- msr_content = ~global_ovf_ctrl_mask;
+ msr_content &= ~global_ovf_ctrl_mask;
wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, msr_content);
}
else
--
1.8.3.1
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