Hi,
On 07/28/2017 08:43 PM, Volodymyr Babchuk wrote:
According to ARM architecture reference manual, exception with
version + paragraph
unknown reason (HSR.EC == 0) have no valid bits in HSR
(apart from HSR.EC), so we can't check if that was caused by
conditional instruction. We need assume that it is uncoditional.
unconditional
Signed-off-by: Volodymyr Babchuk <volodymyr_babc...@epam.com>
---
xen/arch/arm/traps.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index c07999b..eae2212 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1717,7 +1717,7 @@ static int check_conditional_instr(struct cpu_user_regs
*regs,
int cond;
/* Unconditional Exception classes */
- if ( hsr.ec >= 0x10 )
+ if ( hsr.ec == HSR_EC_UNKNOWN || hsr.ec >= 0x10 )
return 1;
/* Check for valid condition in hsr */
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel