On ARMv8 architecture SMC instruction in aarch32 state can be conditional.
Thus, we should not skip it while checking HSR.EC value.
For this type of exception special coding of HSR.ISS is used. There is
additional flag to check before perfoming standart handling of CCVALID
and COND fields.
Signed-off-by: Volodymyr Babchuk <volodymyr_babc...@epam.com>
---
xen/arch/arm/traps.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index eae2212..6a21763 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1717,8 +1717,20 @@ static int check_conditional_instr(struct cpu_user_regs
*regs,
int cond;
/* Unconditional Exception classes */
+#ifdef CONFIG_ARM_32
if ( hsr.ec == HSR_EC_UNKNOWN || hsr.ec >= 0x10 )
return 1;
+#else
+ if ( hsr.ec == HSR_EC_UNKNOWN || (hsr.ec >= 0x10 && hsr.ec !=
HSR_EC_SMC32))
+ return 1;
+
+ /*
+ * Special case for SMC32: we need to check CCKNOWNPASS before
+ * checking CCVALID
+ */
+ if (hsr.ec == HSR_EC_SMC32 && hsr.cond.ccknownpass == 0)
+ return 1;
+#endif
/* Check for valid condition in hsr */
cond = hsr.cond.ccvalid ? hsr.cond.cc : -1;
--
2.7.4
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