Dear Chris, We have recently measured how phase aligned and stable the channels are both in X410 and X440. The PLLs of two LOs (one LO in your case, since >3GHz signals bypass the LO1 in ZBX block diagram<https://files.ettus.com/manual/page_zbx.html>) lock independently from each other you start to observe the phenomenon you have already pointed out: “when the application is restarted the phase offset changes to an essentially arbitrary value”. This finding has also been mentioned in knowledge base<https://files.ettus.com/manual/page_sync.html#sync_phase:~:text=usrp%2D%3Eclear_command_time()%3B-,Align%20LOs%20in%20the%20front%2Dend%20(others),phase%20offset%20due%20to%20the%20dividers%20in%20the%20VCO/PLL%20chains,-.%20This%20offset%20will> but we had chosen the hard way of proving on our own…
Even X440 requires some modification to achieve nearly phase aligned channel. You can check this application note<https://kb.ettus.com/Synchronizing_USRP_Events_Using_Timed_Commands_in_UHD> called “Synchronizing USRP Events Using Timed Commands in UHD”. After retuning LOs and DSP chains of X440 synchronously, we achieved less than 5 degree of phase difference between 4 channels across different initializations. Best regards, Altug KAYA From: Chris Wozny <[email protected]> Sent: Thursday, February 19, 2026 3:30 AM To: [email protected] Subject: [USRP-users] X410/ZBX Session-to-Session Phase Coherence with multi_usrp API We're working on a two-channel phase interferometry application using an X410 with two ZBX daughterboards and am having difficulty achieving consistent inter-channel phase measurements across application restarts. I'm hoping someone on the list has experience with this and can point me in the right direction. I've found quite a few emails on the mailing list from about a year ago on the topic, but they didn't seem to have a resolution (as far as I could tell). Here's my current configuration: NI USRP X410 (Rev 7) Two ZBX daughterboards MPM Version: 5.3 FPGA Version: 8.3 (UC_200) FPGA git hash: c37b318.clean I'm using UHD 4.7.0.0 with the Multi_USRP API in C++. The ports I'm connected to are the RX1 SMA ports on the same daughterboard (A:0 and A:1). The X410 is also connected to an external 10 MHz + 1 PPS reference from an Octoclock. I'm feeding these receive ports with a pulsed waveform from a signal generator connected via a splitter. Problem: Within a single execution of the application, the phase difference between the two channels is extremely stable and consistent pulse-to-pulse. However, when the application is restarted the phase offset changes to an essentially arbitrary value. Across five consecutive runs we observed delta phase values of approximately -25, -154, -25, 74, and -119 degrees at 3050 MHz. The same code (timed command tune requests) and test equipment setup was working with an X310. The phase differences were consistent over a period of a few days of application restarts and power cycles. It seems like there are some fundamental architectural differences between the X310 with two UBX-160s and the X410 with two ZBXs that prevent the same task from being accomplished. Here are the steps we've taken thus far to try and get the same initial phase on both channels from one run of the application to another: 1. Switched clock and time source to "external" to lock to the Octoclock's 10 MHz and 1 PPS reference and polled the ref_locked sensor before proceeding. 2. Used set_time_next_pps() rather than set_time_now() to latch device time on a PPS edge, followed by a sleep longer than one second to guarantee the latch has occurred. 3. Configured subdev spec (A:0 A:1), per-channel parameters (sample rate, bandwidth, gain, antenna), and get_rx_stream() all after the ref_locked wait and PPS latch. 4. Issued simultaneous tune commands to both channels using set_command_time() aligned to the next PPS edge (get_time_now().get_full_secs() + 1.0), followed by another sleep greater than 1 second to allow LO lock. 5. Attempted explicit LO sharing via set_rx_lo_source("internal", "LO1"/"LO2", chan) on both channels, however set_rx_lo_export_enabled() was not supported on this radio so we abandoned that. The within-run phase stability is excellent (sub-degree variation pulse-to-pulse), which suggests the hardware is working correctly. The problem appears to be that something is initializing to an arbitrary phase state on each UHD session that is not being reset by any of the above steps. The ultimate question we have: with an X410 and two ZBX daughterboards is multi-channel phase coherence across multiple UHD sessions possible? If so, are there any steps we might be missing or out of order from what we tried above? Feeding in a known signal every time we start a session is not an option. There was some chatter in the mailing list about newer versions of UHD resolving this, but other replies from March 2025 left it ambiguous (to me at least) as to whether this was fixed for X410s or X440s or fixed at all. Any guidance you all might provide is greatly appreciated! Best, Chris
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