Hi Everyone, The header of my N300 yaml file is shown below, but this results in an HG image being built, not the XG. (I am building this with UHD-4.8.)
The HG image does contain my new RFNoC block, with the right endpoints etc., so I believe the yaml config should be (mostly) correct? I find it strange because the bit file that is generated also has the name "usrp_n300_fpga_XG.bit". When loaded, "usrp_find_devices" returns: -------------------------------------------------- -- UHD Device 0 -------------------------------------------------- Device Address: serial: XXXXXXX claimed: False fpga: HG mgmt_addr: 127.0.0.1 name: ni-n3xx-XXXXXXX product: n300 type: n3xx Is there something I might be missing somewhere? Many thanks, Kevin schema: rfnoc_imagebuilder_args # Identifier for the schema used to validate this file copyright: >- # Copyright information used in file headers Copyright 2023 Ettus Research, a National Instruments Brand license: >- # License information used in file headers SPDX-License-Identifier: LGPL-3.0-or-later version: '1.0' # File version chdr_width: 64 # Bit width of the CHDR bus for this image device: 'n300' default_target: 'N300_XG' image_core_name: 'usrp_n300_fpga_XG'
smime.p7s
Description: S/MIME cryptographic signature
_______________________________________________ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com