Wade, Thank you very much for the detailed explanation.
On Fri, Nov 1, 2024 at 10:35 AM Wade Fife <wade.f...@ettus.com> wrote: > Hi Andrew, > > This is true of all RFNoC images. The "ctrl" setting refers to whether or > not that endpoint has a connection to the control crossbar, which is used > for sending control packets (e.g., register reads/writes) to/from RFNoC > blocks. Because you can send control packets to any RFNoC block from any > control port master, you only need one endpoint with a control port to be > able to do control communication with all the RFNoC blocks. So you have to > have at least one endpoint with a control port and having more than one > wastes logic because currently only the first one will be used. > > Wade > > On Thu, Oct 31, 2024 at 9:24 AM Andrew D <sciensfpga...@gmail.com> wrote: > >> It appears that in all of the x410 and x440 image core yaml files, that >> EP0 is the only endpoint that is configured with `ctrl:True`. Is this >> necessary and why is EP0 the only endpoint that requires control? >> >> Thank you! >> Andrew >> _______________________________________________ >> USRP-users mailing list -- usrp-users@lists.ettus.com >> To unsubscribe send an email to usrp-users-le...@lists.ettus.com >> >
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