Hello Martin,
I ran both commands and got this as a result.
root@ni-n3xx-3177E63:\~# systemctl stop usrp-hwd
root@ni-n3xx-3177E63:\~# usrp_hwd.py -v
\[MPM.main\] \[INFO\] Launching USRP/MPM, version: 4.6.0.0-g50fa3baa
\[MPM.main\] \[INFO\] Spawning RPC process...
\[MPM.main\] \[DEBUG\] RPC process has PID: 571
\[MPM.main\] \[INFO\] Spawning discovery process...
\[MPM.main\] \[DEBUG\] Discovery process has PID: 572
\[MPM.main\] \[INFO\] Processes launched. Registering signal handlers.
\[MPM.PeriphManager\] \[INFO\] Device serial number: 3177E63
\[MPM.PeriphManager\] \[DEBUG\] Reading EEPROM info for dboard 0...
\[MPM.PeriphManager\] \[DEBUG\] Found dboard PID in EEPROM: 0x0150
\[MPM.PeriphManager\] \[DEBUG\] Reading EEPROM info for dboard 1...
\[MPM.PeriphManager\] \[DEBUG\] Found dboard PID in EEPROM: 0x0150
\[MPM.PeriphManager\] \[DEBUG\] Motherboard requests device tree overlays:
\['n310'\]
\[MPM.DTO\] \[DEBUG\] Overlay \`n310' was already applied, not applying again.
\[MPM.PeriphManager\] \[DEBUG\] Using default args: {}
\[MPM.PeriphManager\] \[DEBUG\] Initializing dboard 0...
\[MPM.dboardManager\] \[DEBUG\] spidev device node map: {'cpld':
'/dev/spidev0.0', 'lmk': '/dev/spidev0.1', 'mykonos': '/dev/spidev0.2',
'phase_dac': '/dev/spidev0.3'}
\[MPM.Magnesium-0\] \[DEBUG\] Loading C++ drivers...
\[MPM.Magnesium-0\] \[DEBUG\] AD9371: ARM version: 184.72.95 Release API
version: 1.5.1.3565 Device revision: 7
\[MPM.Magnesium-0.CPLD\] \[DEBUG\] Initializing CPLD...
\[MPM.Magnesium-0.CPLD\] \[DEBUG\] CPLD Signature: 0xCAFE Revision: 5.0 Date
code: 0x18010408
\[MPM.PeriphManager\] \[DEBUG\] Initializing dboard 1...
\[MPM.dboardManager\] \[DEBUG\] spidev device node map: {'cpld':
'/dev/spidev1.0', 'lmk': '/dev/spidev1.1', 'mykonos': '/dev/spidev1.2',
'phase_dac': '/dev/spidev1.3'}
\[MPM.Magnesium-1\] \[DEBUG\] Loading C++ drivers...
\[MPM.Magnesium-1\] \[DEBUG\] AD9371: ARM version: 5.1.1 Release API version:
1.5.1.3565 Device revision: 4
\[MPM.Magnesium-1.CPLD\] \[DEBUG\] Initializing CPLD...
\[MPM.Magnesium-1.CPLD\] \[DEBUG\] CPLD Signature: 0xCAFE Revision: 5.0 Date
code: 0x18010408
\[MPM.PeriphManager\] \[INFO\] Initialized 2 daughterboard(s).
\[MPM.PeriphManager\] \[DEBUG\] Actual FPGA compat number: 8.2
\[MPM.PeriphManager\] \[DEBUG\] Minor compat ahead of expected compat for
component 'FPGA'. Expected: 8.1 Actual: 8.2
\[MPM.PeriphManager\] \[DEBUG\] FPGA supports the following features:
remote_udp_streaming
\[MPM.PeriphManager\] \[DEBUG\] Setting clock source to \`internal'
\[MPM.PeriphManager\] \[DEBUG\] Reference clock source is: internal
\[MPM.PeriphManager\] \[DEBUG\] Reference clock frequency is: 25.0 MHz
\[MPM.PeriphManager\] \[DEBUG\] Setting time source to \`internal'
\[MPM.PeriphManager.MBRegs\] \[DEBUG\] Setting time source to internal (25 MHz
reference)...
\[MPM.PeriphManager\] \[DEBUG\] Updating mboard FPGA type info to HG
\[MPM.PeriphManager\] \[DEBUG\] Found the following GPIO sources:
PS,RF0,RF1,RF2,RF3
\[MPM.PeriphManager.UDP.UDP\] \[DEBUG\] Found CHDR interfaces: \`sfp0, int0'
\[MPM.PeriphManager\] \[DEBUG\] Device info: {'type': 'n3xx', 'pid': '16962',
'serial': '3177E63', 'rev': '6', 'eeprom_version': '2', 'mpm_sw_version':
'4.6.0.0-g50fa3baa', 'fs_version': '20231113194400', 'mender_artifact':
'v4.6.0.0_n3xx', 'dboard_0_pid': '336', 'dboard_0_serial': b'319803C',
'dboard_1_pid': '336', 'dboard_1_serial': b'317532F', 'product': 'n310'}
\[MPM.PeriphManager\] \[INFO\] init() called with device args
\`clock_source=internal,time_source=internal'.
\[MPM.PeriphManager.UDP.UDP\] \[DEBUG\] Found CHDR interfaces: \`sfp0, int0'
\[MPM.misc-enet-regs0\] \[DEBUG\] Setting my own IP address to \`192.168.10.2'
\[MPM.misc-enet-int-regs\] \[DEBUG\] Setting my own IP address to \`169.254.0.1'
\[MPM.misc-enet-int-regs\] \[DEBUG\] Setting internal MAC address to
\`00:01:02:03:04:05'
\[MPM.misc-enet-int-regs\] \[DEBUG\] Setting internal IP address to
\`169.254.0.2'
\[MPM.misc-enet-int-regs\] \[DEBUG\] Setting internal Mode
\[MPM.PeriphManager.XportAdapterMgr@sfp0\] \[DEBUG\] Transport adapter compat
number: 1.0 Capabilities: rx_hdr_removal, rx_routing Node instance: 0
\[MPM.PeriphManager\] \[DEBUG\] Loaded transport adapter managers for the
following interfaces: sfp0
\[MPM.PeriphManager\] \[DEBUG\] Initializing dboards in parallel...
\[MPM.Magnesium-0\] \[DEBUG\] init() called with args
\`clock_source=internal,time_source=internal'
\[MPM.Magnesium-0\] \[DEBUG\] Updating master clock rate to 125.00 MHz!
\[MPM.Magnesium-1\] \[DEBUG\] init() called with args
\`clock_source=internal,time_source=internal'
\[MPM.Magnesium-1\] \[DEBUG\] Updating master clock rate to 125.00 MHz!
\[MPM.Magnesium-0.init\] \[DEBUG\] Reset Dboard Clocking and JESD204B
interfaces...
\[MPM.Magnesium-0.init.LMK04828\] \[DEBUG\] Using reference clock frequency:
25.0 MHz
\[MPM.Magnesium-0.init.LMK04828\] \[DEBUG\] Using master clock frequency: 125.0
MHz
\[MPM.Magnesium-1.init\] \[DEBUG\] Reset Dboard Clocking and JESD204B
interfaces...
\[MPM.Magnesium-1.init.LMK04828\] \[DEBUG\] Using reference clock frequency:
25.0 MHz
\[MPM.Magnesium-1.init.LMK04828\] \[DEBUG\] Using master clock frequency: 125.0
MHz
\[MPM.Magnesium-0.init.LMK04828\] \[DEBUG\] Clocks Initialized and PLLs Locked!
\[MPM.Sync-0\] \[DEBUG\] Starting clock synchronization...
\[MPM.Sync-0\] \[DEBUG\] Configuring the TDC...
\[MPM.Magnesium-1.init.LMK04828\] \[DEBUG\] Clocks Initialized and PLLs Locked!
\[MPM.Sync-1\] \[DEBUG\] Starting clock synchronization...
\[MPM.Sync-1\] \[DEBUG\] Configuring the TDC...
\[MPM.Magnesium-1.init\] \[DEBUG\] Residual synchronization error: 56.3 ps.
\[MPM.Magnesium-1.init\] \[DEBUG\] Sample Clock Synchronization Complete!
\[MPM.Magnesium-1.init\] \[DEBUG\] Sample Clocks and Phase DAC Configured
Successfully!
\[MPM.NIJESD204bCore-1\] \[DEBUG\] Disabling the eye scan circuitry in the PMA
for the GTXs...
\[MPM.Magnesium-1.CPLD\] \[DEBUG\] Resetting AD9371!
\[MPM.Magnesium-1.init\] \[DEBUG\] Setting up LO source..
\[MPM.Magnesium-1.init\] \[DEBUG\] RX LO source is set at internal
\[MPM.Magnesium-1.init\] \[DEBUG\] TX LO source is set at internal
\[MPM.Magnesium-0.init\] \[DEBUG\] Residual synchronization error: 54.8 ps.
\[MPM.Magnesium-0.init\] \[DEBUG\] Sample Clock Synchronization Complete!
\[MPM.Magnesium-0.init\] \[DEBUG\] Sample Clocks and Phase DAC Configured
Successfully!
\[MPM.Magnesium-1.init\] \[DEBUG\] args\[init_cals\]=0x4DFF
\[MPM.Magnesium-1.init\] \[DEBUG\] args\[tracking_cals\]=0xC3
\[MPM.Magnesium-1.init\] \[DEBUG\] JESD204B Link Initialization & Training
Complete
\[MPM.PeriphManager\] \[WARNING\] Failed to initialize device on boot:
RuntimeError: ARM Mailbox Busy. Command not executed in MYKONOS_sendArmCommand()
\[MPM.PeriphManager.UDP.UDP\] \[DEBUG\] Found CHDR interfaces: \`sfp0'
\[MPM.RPCServer\] \[DEBUG\] Registered 66 motherboard methods, 130
daughterboard methods.
\[MPM.RPCServer\] \[INFO\] RPC server ready!
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