On 22/03/2023 18:22, Marcus Müller wrote:
Hi,
don't have a device to test with me, but don't forget that the
*tuning* to that frequency might be technically possible due to FPGA
frequency shifting, so that indeed the frequency 10000 kHz gets
shifted to baseband, 0 Hz.
(You being able to observe the LO hints at that: the "physical" tuner
doesn't go as low, and the remainder of frequency shifting is done
digitally, so that the LO doesn't end up at 0 Hz.)
However, this doesn't mean that the analog signal chain can actually
let through that frequency. In the end, the N32x has an RF frontend,
and its DC response is undefined/bad by design.
You can probably work around that, but it depends on your use case:
Why are you trying to observe a 100 kHz-centered signal with a device
that has a bandwidth thousands of times of that? I suspect you're on
to something interesting!
The quoted "3MHz" lowest frequency in the datasheet is likely *ALREADY*
due to "stupid DDC tricks". The LMX2592 PLL synthesizer
has a lowest-possible LO output of 20MHz.
The low-band pathway on the input goes through a pair of LFCN-400+
filters. My guess is that they aren't wonderful below 1MHz or so. It's
also possibly the case that the "tuning logic" in UHD simply doesn't
consider anything below 3MHz, since that's what's
started on the datasheet.
Something like an N210 with a LF_RX will allow you to "reach" all the
way down to close to DC. I also recall doing VLF
experiments with a USRP1+BASIC_RX about 12 years ago. Although the
BASIC_RX "officially" only goes down to 1MHz,
in practice, you can "reach" considerably lower.
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