Thanks for the suggestions Wade. I will first try the low-hanging fruit of using the 300MHz DRAM clock. Fingers crossed! Rob
On Thu, Feb 24, 2022 at 6:43 PM Wade Fife <wade.f...@ettus.com> wrote: > Hi Rob, > > RFNoC doesn't support generating user clocks for you yet (the range value > is not currently used). You could use the `dram` clock on N310 and connect > that to the `ce` inputs of your blocks. That should be about 300 MHz. The > `rfnoc_chdr` clock is 200 MHz on N310. > > If it won't close timing with the dram clock, and you want something > slower, then you can modify the HDL to add the clock you want. Take a look > at n3xx_clocking.v. You could probably modify the misc_clock_gen IP block > to add a clock closer to 260 MHz. You'd then have to route that clock into > n3xx_core then rfnoc_image_core, and add the new clock to n310_bsp.yml for > the rfnoc_image_builder to generate code to use it. Adding custom clocks is > a pretty manual process at the moment. > > Wade > > On Wed, Feb 23, 2022 at 10:15 PM Rob Kossler <rkoss...@nd.edu> wrote: > >> Hi, >> I have a signal processing block that includes a zero-padded FFT (50% >> zeros) that I built for the N310. Because of the throttling that occurs >> during insertion of zeros, I expect that my FFT will need to be clocked at >> a bit more than twice the max sample rate. So, since I want to operate the >> N310 at the highest sample rate of 125 MS/s, it seems that my FFT will need >> to be clocked >= 260 MHz. I'm wondering how to do it. >> >> I've looked at the RFNoC specification and my block is already set up to >> use the "CE" clock for both control & data. In the rfnoc spec, it mentions >> that I can enter a "range" for my clock in the block definition yaml. But, >> I also see that in the end, the top N310 yaml will require me to map a >> _device clock to my block's CE clock port. >> >> It's not clear to me how this works. Does it help to provide a range in >> the block definition yaml? Or, perhaps it is even necessary? How do I >> specify in the top N310 yaml which device clock will map to my blocks CE >> clock port? It seems to me that I am missing a step (defining a clock >> somewhere?). >> >> I am pretty much a novice, so I expect that this is the cause of my >> confusion. I am even struggling to figure out what the current clock rates >> are (rfnoc_ctrl, rfnoc_chdr, ce, etc) and where they are defined. Any help >> would be appreciated. >> Rob >> _______________________________________________ >> USRP-users mailing list -- usrp-users@lists.ettus.com >> To unsubscribe send an email to usrp-users-le...@lists.ettus.com >> >
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