On 06/23/2020 03:18 PM, Aaron Smith wrote:
Marcus,

They are EndRun Meridian and Meridian II units.

I am very ignorant on this topic. Is it a standard that the 1 PPS should coincide with the top of a 10 MHz cycle? I just wouldn't expect the front end transmit delay, relative to the 1 PPS input, to depend on the 10 MHz reference phase. I don't understand how the 10 MHz reference and 1 PPS input are used to synthesize time. Is the 1 PPS detection done at the master lock rate (200 MHz) or at 10 MHz?
The 1PPS is used *exactly once*, when you do a "set_time_next_pps", after which the time-of-day clock on the board is driven by the master clock which is phase-locked to the 10MHz external reference. So, the time-of-day clock on the board runs at (in the case of the X310) 200MHz by default, so each "tick" is 5nsec. The 1PPS signal is probably "sensed" by logic that's running at the master clock rate. So two X310 units may still have a small amount of residual ambiguity about when 1PPS "happens", by perhaps as much as 5Nsec. But I'm not an FPGA designer, so
  this is just an mildly-educated "guess".

There may be some lose convention about the phase of the 1PPS with respect to the 10MHz generated reference, but would not expect it to be an "enforced standard". Different manufacturers will have different "servo" algorithms for steering the 10MHz clock output (usually, it's a voltage-tunable VCTCXO or VOCXO) with respect to the *derived* 1PPS pulses. The error on the 1PPS signal is typically surprisingly large--it's 1PPS +/- a few 10s of nanoseconds, and the phasing of that 1PPS with respect to the 10MHz signal isn't, I think, necessarily a "standard".

On Tue, Jun 23, 2020 at 1:06 PM Marcus D. Leech via USRP-users <usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:

    On 06/23/2020 02:45 PM, Aaron Smith via USRP-users wrote:
    > Hello,
    >
    > I am attempting to release a transmission from an X310 every
    second.
    > To accomplish this, I must measure, and calibrate the delay in
    the RF
    > front end of the radio for my chosen sample rate. I'd like the
    > transmission to be released within 1 clock cycle of the rising
    edge of
    > the PPS.
    >
    > I am feeding the X310 an external 10 MHz reference and 1 PPS, which
    > are produced by the same source, and are being supplied to the
    radio
    > with matched cable lengths. The source is a GPS receiver and in
    my lab
    > I have 2 different generations of the GPS receiver.
    >
    > While calibrating the front end transmit delay I noticed a
    discrepancy
    > in the radio timing between the separate GPS receiver
    generations. The
    > 1st generation of GPS receiver is 50 ns different than the
    calibration
    > for the 2nd generation. When I look at the 1 PPS and 10 MHz
    output on
    > a scope, I noticed that in the 1st generation the PPS occurs at the
    > top of a 10 MHz cycle, and in the 2nd generation it occurs at the
    > bottom of a 10 MHz cycle. Half a cycle at 10 MHz is 50 ns. I
    suspect
    > this is not coincidence because I have now tested 6 different GPS
    > receivers, 3 of gen 1 and 3 of gen 2, and all 3 gen 1
    calibrations are
    > the same and they are 50 ns different from the gen 2 calibrations.
    >
    > Is this the expected behavior? Or is there a bug in the X310
    code that
    > handles timing? I have never worked on hardware, but I would not
    > expect the initial phase of a 10 MHz reference to impact
    absolute time.
    >
    > Thanks for your help!
    >
    >
    These are external GPS receivers?  What kind?  Given your scope
    measurements, how would this be related to a bug in X310?  I'm
    confused
       as to how you're linking the 10MHz/1PPS phasing on your
    external GPS
    receivers to the X310 having bugs.



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