Very cool! Feel free to reach out if you have any questions or issues. Right now it's set up as a M/2 channelizer, and the output rate is 2x input rate. All the channels come out interleaved and have to be deinterleave in software (you'll see in the example flowgraph).
Cheers, EJ On Thu, Jul 25, 2019, 11:14 AM Nick Foster <bistrom...@gmail.com> wrote: > I'll test! Forgot about this one and now have a very good use case for it. > I'll let you know how it goes. > > On Wed, Jul 24, 2019 at 4:35 PM EJ Kreinar via USRP-users < > usrp-users@lists.ettus.com> wrote: > >> Hi Royce, >> >> Phil and I have been working on the channelizer in the theseus-cores repo >> here: gitlab.com/theseus-cores/theseus-cores >> >> The master branch has a (potentially) working channelizer, at least >> according to my recent tests on the x310, as long as the network interface >> supports the desired output rate. >> >> There's also an fpga solution for channel downselection in a branch that >> Phil put together. The ball is in my court to turn the crank and merge to >> master with supporting software, but I haven't gotten much of a chance >> recently. >> >> If you're interested in testing we could definitely use some more people >> to give it a shot :D Let me know if you need a sample bitstream or if you >> can build one yourself. >> >> EJ >> >> On Wed, Jul 24, 2019, 4:39 PM Royce Connerley via USRP-users < >> usrp-users@lists.ettus.com> wrote: >> >>> At the 2018 GRCon, EJ Kreinar spoke about improvements to the RFNoC >>> polyphase channelizer. Has there been any activity on this? >>> >>> Royce Connerley >>> _______________________________________________ >>> USRP-users mailing list >>> USRP-users@lists.ettus.com >>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >>> >> _______________________________________________ >> USRP-users mailing list >> USRP-users@lists.ettus.com >> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >> >
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