The N310 design (i have tried both the HG and XG ) specify the following: UART0 on MIO pin 14:15, PJTAG on pin 10:13 UART1 on MIO pin 8:9 I2C0 on MIO pin 50:51
there is also GPIO pins on 46:49. All the above pins when looking at the MB schematic have different assignments. Namely, MIO 14:15 -> PS-I2C0-SCL, PS-I2C0-SDA MIO 10:13 -> PS-UART0-RX, PS-UART0-TX,SYS-PS-I2C-SCL, ...SDA et.al 1) In short, which one is correct? Datasheet or NI design? and whichever is corect, does that hold true for all the other connections also? 2) I only see one of the two I2C controllers enabled in the PS. Where is SYS-PS-I2C-SCL coming from the schematic? 3) Where is the microcontroller code for the STM32F072RBT6 code located? I tried looking under ./firmware but I dont see it? 4) Am i correct in assuming for all FPGA images except White Rabbit, the phase dac that is used for controlling VCXO is set at just about mid-range and does not get adjusted? In general, a clearer picture of what the values are being programmed in the LMK and their sequence or an overview of the clock output values generated would be appreciated. Thank you, Samuel Berhanu
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