The B200/B210 has an Analog Devices analog PLL (ADF4002) [U101].
The B200mini series are intended as small form factor, low-cost SDRs, not
high-precision devices. The PLL is implemented as digital logic in the
FPGA to minimize both cost and PCB board space, but limits the phase and
frequency accuracy.
-Robin
On Wed, Jan 2, 2019 at 11:53 AM Martin K via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Brais,
>
> I have two USRP here in front of me: B210, B200mini
> When I run a sample program (C++) which specifies an external
> reference, the B200mini shows a variable frequency offset. It seems to
> lock (with high jitter) but then it "jumps" and I would say the offset
> changes by +-10 Hz for a few seconds, then it stabilizes (and repeats
> this behavior, forever).
>
> When I run the same exact program with my B210 the phase stays visibly
> locked and I see no problems with the frequency jumping around.
>
> Therefore (I hesitantly say) I believe there is something undesirable
> going on with the B200mini or something in UHD/firmware.
>
> My test setup is thus:
>
> 10MHz rubidium reference --> N5182B Vector Signal Generator (BPSK
> mode, 10kHz symbol rate) --> Ettus B200mini --or-- B210 (same 10 MHz
> reference attached)
>
> Sample code is C++, derived from usrp_recv_to_udp
> [INFO] [UHD] Win32; Microsoft Visual C++ version 14.1; Boost_106800;
> UHD_3.13.0.3-0-unknown
>
> External reference is specified (and an exception is raised if 10 MHz
> is not present).
> My code is filtering and downsampling to baseband. I am viewing the
> data in a constellation diagram which allows me to see the phase lock
> or baseband rotation of the BPSK points.
>
> I am happy to provide more information to solve this issue.
> --
> Martin Klingensmith
>
>
>
>
>
>
>
>
> On Wed, Jan 2, 2019 at 9:56 AM Brais Ares via USRP-users
> <usrp-users@lists.ettus.com> wrote:
> >
> > Hello,
> >
> > We've just bought an AXIOM90 OCXO [1] (actual configuration: 5 V, ±50
> ppb, +7.7 dBm) and we are having trouble configuring it as an external
> clock reference on a B200mini.
> >
> > All we do in code is set the clock source as external:
> >
> > usrp->set_clock_source("external");
> >
> > And loop until it gets locked by checking:
> >
> > uhd::sensor_value_t ref_locked = usrp->get_mboard_sensor("ref_locked",
> 0);
> >
> > Once it's locked we capture 60 seconds of a RF sinusoid waveform
> centered at the central frequency (100 MHz) and plot its spectrum using
> Matlab. We would expect:
> >
> > Frequency drift - Internal oscillator [2] @ ±2 ppm = ±200 Hz
> >
> > Captured tone shows a freq. offset of +126 Hz, makes sense (see image
> and image zoomed in)
> >
> > Frequency drift - External oscillator (Agilent E4438C Signal generator,
> output power: +10 dBm)
> >
> > Captured tone shows a freq. offset of -3 Hz, makes sense, but the tone
> is heavily distorted (see image and image zomeed in).
> >
> > Frequency drift - External oscillator (AXIOM90) @ ±50 ppb (0.05 ppm)
> = ±5.4 Hz
> >
> > Freq. offset of +127 Hz, which does not make sense, and the tone is
> heavily distorted as well (see image and image zomeed in).
> >
> > We've been fighting this for a few days. Any point of view is welcome
> here.
> >
> > Regards and happy new year :)
> > Brais.
> >
> > [1] - http://www.axtal.com/cms/docs/doc86239.pdf
> > [2] - https://www.ettus.com/content/files/USRP_B200mini_Data_Sheet.pdf
> >
> > _______________________________________________
> > USRP-users mailing list
> > USRP-users@lists.ettus.com
> > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
>
> --
> Martin K.
>
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