Hi,

A conceptual question: for the b205 mini, how does the FPGA get the 64-bit
VITA timefield? I know the PPS/10 MHz can be used to sync the clocks to,
but trying to understand how the timestamp is synchronized to a
UTC/known-good reference value. Reading the HDL, it seems that the
timestamp is programmed from software, but needed confirmation.

Thanks
Chintan
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