From: Yeo Jin Kuang Alvin (IA)
Sent: Friday, 6 April 2018 10:55 AM
To: 'Neel Pandeya'
Subject: RE: [USRP-users] USRP B210

Hi Neel,

I am trying to output a chirp signal by creating a DDS in the FPGA using Xilinx 
ISE 14.7. The code is done from scratch and created a SPI module in the FPGA to 
control the AD9361 to output the signal. Set up the constraints file gotten 
from ettus research in git.

This are my usual steps:

1)      uhd_usrp_probe  - -args=”master_clock_rate=40e6”   (I am setting to 
40MHz as I am using the codec_main_clk in the AD9361 as my main clock, not sure 
if this is right but simulation/chipscope seems fine )

2)      Opened Xilinx ISE 14.7

3)      Generate .bit file

4)      Run on IMPACT using JTAG cable

5)      Program the file


But I couldn’t get any signal out from the transmitter, there is no software 
C++ or GNU Radio involve. Just solely on FPGA  as I am task to create a chirp 
signal using FPGA. I might have missed out something, like configuration or 
concept is not right. Just not sure where and how.

Thank you in advance!


From: Neel Pandeya [mailto:neel.pand...@ettus.com]
Sent: Friday, 6 April 2018 10:34 AM
To: Yeo Jin Kuang Alvin (IA)
Cc: usrp-users@lists.ettus.com<mailto:usrp-users@lists.ettus.com>
Subject: Re: [USRP-users] USRP B210

Hello Yeo Jin Kuang Alvin:
If you're modifying the FPGA, then there will likely be a corresponding 
modification needed on the host-side, especially for something as significant 
as starting a transmit stream and/or controlling the AD9361 in some way. We'll 
need much more detail in order to be able to help further. What changes did you 
make to the FPGA? What exactly are you trying to do overall?

--​Neel Pandeya


On 5 April 2018 at 18:07, Yeo Jin Kuang Alvin (IA) via USRP-users 
<usrp-users@lists.ettus.com<mailto:usrp-users@lists.ettus.com>> wrote:
Hi everyone,

I have tried to program the Spartan 6 FPGA using Xilinx 14.7 to send out a 
signal and to control the AD9361. However, I couldn’t get an output out from 
the transmitter. Can I just solely on FPGA or must I use the API for the USRP 
B210? What are the steps and procedures I have to do to configure the board, I 
just feel that I might miss out some important steps.

Thank you in advance!

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