Hi Kailash,

As far as I'm aware, this remains a known problem with the E310s. See a
mailing-list thread here for the status as of January of 2018:
https://www.mail-archive.com/usrp-users@lists.ettus.com/msg03926.html

There's also reports of this problem going back to April-ish 2017. Since
uhd/rfnoc-devel is still tracking an October 2017 commit, you are likely
seeing a similar issue. I've heard mention that it's not a "blocking"
problem, that is, it should not impact nominal operation of E310 programs;
just the shutdown sequence.

Hope this helps,
EJ

On Fri, Mar 23, 2018 at 5:42 AM, kailash kumar via USRP-users <
usrp-users@lists.ettus.com> wrote:

> Hi,
>
> I've successfully installed  RFNoC for e312.
>
> but after running  uhd_usrp_probe I am getting an error -  [ERROR] [UHD]
> Exception caught in safe-call.
>
> the same Exception is coming when I run the UHD example
> ./rx_samples_to_file
>
> I am using
>
> UHD: UHD_4.0.0.rfnoc-devel-409-gec9138eb
>
> GNURADIO: 3.7.12git-361-g713629cc
>
> GR_ETTUS: branch master/
>
>
>
>
> root@ettus-e3xx-sg3:~# uhd_usrp_probe
> [INFO] [UHDlinux; GNU C++ version 5.2.0; Boost_105800;
> UHD_4.0.0.rfnoc-devel-409-gec9138eb]
> [INFO] [E300] Loading FPGA image: /usr/share/uhd/images/usrp_e31
> 0_fpga_sg3.bit...
> [INFO] [E300] FPGA image loaded
> [INFO] [E300] Initializing core control (global registers)...
>
> [INFO] [E300] Performing register loopback test...
> [INFO] [E300] Register loopback test passed
> [INFO] [RFNOC RADIO] Register loopback test passed
> [INFO] [RFNOC RADIO] Register loopback test passed
> [WARNING] [RFNOC] [0/fosphor_0] defines 2 input buffer sizes, but 1 input
> ports
> [INFO] [AD936X] Performing CODEC loopback test...
> [INFO] [AD936X] CODEC loopback test passed
> [INFO] [AD936X] Performing CODEC loopback test...
> [INFO] [AD936X] CODEC loopback test passed
> [INFO] [CORES] Performing timer loopback test...
> [INFO] [CORES] Timer loopback test passed
>   _____________________________________________________
>  /
> |       Device: E-Series Device
> |     _____________________________________________________
> |    /
> |   |       Mboard: E3XX
> |   |   product: 30675
> |   |   revision: 6
> |   |   serial: 312EE16
> |   |   mac-addr: 00:80:2f:17:d1:46
> |   |   FPGA Version: 255.0
> |   |   FPGA git hash: f764326-dirty
> |   |   RFNoC capable: Yes
> |   |
> |   |   Time sources:  none, internal, external
> |   |   Clock sources: internal
> |   |   Sensors: temp, ref_locked
> |   |     _____________________________________________________
> |   |    /
> |   |   |       RX DSP: 0
> |   |   |
> |   |   |   Freq range: 0.000 to 0.000 MHz
> |   |     _____________________________________________________
> |   |    /
> |   |   |       RX DSP: 1
> |   |   |
> |   |   |   Freq range: 0.000 to 0.000 MHz
> |   |     _____________________________________________________
> |   |    /
> |   |   |       RX Dboard: A
> |   |   |   ID: E310 MIMO XCVR (0x0110)
> |   |   |   Serial: 312CB16
> |   |   |     _____________________________________________________
> |   |   |    /
> |   |   |   |       RX Frontend: A
> |   |   |   |   Name: FE-RX2
> |   |   |   |   Antennas: TX/RX, RX2
> |   |   |   |   Sensors: temp, rssi, lo_locked
> |   |   |   |   Freq range: 50.000 to 6000.000 MHz
> |   |   |   |   Gain range PGA: 0.0 to 76.0 step 1.0 dB
> |   |   |   |   Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz
> |   |   |   |   Connection Type: IQ
> |   |   |   |   Uses LO offset: No
> |   |   |     _____________________________________________________
> |   |   |    /
> |   |   |   |       RX Frontend: B
> |   |   |   |   Name: FE-RX1
> |   |   |   |   Antennas: TX/RX, RX2
> |   |   |   |   Sensors: temp, rssi, lo_locked
> |   |   |   |   Freq range: 50.000 to 6000.000 MHz
> |   |   |   |   Gain range PGA: 0.0 to 76.0 step 1.0 dB
> |   |   |   |   Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz
> |   |   |   |   Connection Type: IQ
> |   |   |   |   Uses LO offset: No
> |   |   |     _____________________________________________________
> |   |   |    /
> |   |   |   |       RX Codec: A
> |   |   |   |   Name: E3x0 RX dual ADC
> |   |   |   |   Gain Elements: None
> |   |     _____________________________________________________
> |   |    /
> |   |   |       TX DSP: 0
> |   |   |
> |   |   |   Freq range: 0.000 to 0.000 MHz
> |   |     _____________________________________________________
> |   |    /
> |   |   |       TX DSP: 1
> |   |   |
> |   |   |   Freq range: 0.000 to 0.000 MHz
> |   |     _____________________________________________________
> |   |    /
> |   |   |       TX Dboard: A
> |   |   |   ID: E310 MIMO XCVR (0x0110)
> |   |   |   Serial: 312CB16
> |   |   |     _____________________________________________________
> |   |   |    /
> |   |   |   |       TX Frontend: A
> |   |   |   |   Name: FE-TX2
> |   |   |   |   Antennas: TX/RX
> |   |   |   |   Sensors: temp, lo_locked
> |   |   |   |   Freq range: 50.000 to 6000.000 MHz
> |   |   |   |   Gain range PGA: 0.0 to 89.8 step 0.2 dB
> |   |   |   |   Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz
> |   |   |   |   Connection Type: IQ
> |   |   |   |   Uses LO offset: No
> |   |   |     _____________________________________________________
> |   |   |    /
> |   |   |   |       TX Frontend: B
> |   |   |   |   Name: FE-TX1
> |   |   |   |   Antennas: TX/RX
> |   |   |   |   Sensors: temp, lo_locked
> |   |   |   |   Freq range: 50.000 to 6000.000 MHz
> |   |   |   |   Gain range PGA: 0.0 to 89.8 step 0.2 dB
> |   |   |   |   Bandwidth range: 200000.0 to 56000000.0 step 0.0 Hz
> |   |   |   |   Connection Type: IQ
> |   |   |   |   Uses LO offset: No
> |   |   |     _____________________________________________________
> |   |   |    /
> |   |   |   |       TX Codec: A
> |   |   |   |   Name: E3x0 TX dual DAC
> |   |   |   |   Gain Elements: None
> |   |     _____________________________________________________
> |   |    /
> |   |   |       RFNoC blocks on this device:
> |   |   |
> |   |   |   * Radio_0
> |   |   |   * FIFO_0
> |   |   |   * Window_0
> |   |   |   * FFT_0
> |   |   |   * fosphor_0
> |   |   |   * FIFO_1
> |   |   |   * FIR_0
>
> [INFO] [E300] Loading FPGA image: /usr/share/uhd/images/usrp_e3x
> x_fpga_idle_sg3.bit...
> [INFO] [E300] FPGA image loaded
> [ERROR] [UHD] Exception caught in safe-call.
>   in virtual ctrl_iface_impl::~ctrl_iface_impl()
>   at rfnoc/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
> this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
>   in typename T::sptr e300_transport::get_buff(double) [with T =
> uhd::transport::managed_send_buffer; typename T::sptr =
> boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
>   at rfnoc/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257
>
> [ERROR] [UHD] Exception caught in safe-call.
>   in virtual ctrl_iface_impl::~ctrl_iface_impl()
>   at rfnoc/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
> this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
>   in typename T::sptr e300_transport::get_buff(double) [with T =
> uhd::transport::managed_send_buffer; typename T::sptr =
> boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
>   at rfnoc/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257
>
> [ERROR] [UHD] Exception caught in safe-call.
>   in virtual ctrl_iface_impl::~ctrl_iface_impl()
>   at rfnoc/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
> this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
>   in typename T::sptr e300_transport::get_buff(double) [with T =
> uhd::transport::managed_send_buffer; typename T::sptr =
> boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
>   at rfnoc/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257
>
> [ERROR] [UHD] Exception caught in safe-call.
>   in virtual ctrl_iface_impl::~ctrl_iface_impl()
>   at rfnoc/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
> this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
>   in typename T::sptr e300_transport::get_buff(double) [with T =
> uhd::transport::managed_send_buffer; typename T::sptr =
> boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
>   at rfnoc/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257
>
> [ERROR] [UHD] Exception caught in safe-call.
>   in virtual ctrl_iface_impl::~ctrl_iface_impl()
>   at rfnoc/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
> this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
>   in typename T::sptr e300_transport::get_buff(double) [with T =
> uhd::transport::managed_send_buffer; typename T::sptr =
> boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
>   at rfnoc/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257
>
> [ERROR] [UHD] Exception caught in safe-call.
>   in virtual ctrl_iface_impl::~ctrl_iface_impl()
>   at rfnoc/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
> this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
>   in typename T::sptr e300_transport::get_buff(double) [with T =
> uhd::transport::managed_send_buffer; typename T::sptr =
> boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
>   at rfnoc/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257
>
> [ERROR] [UHD] Exception caught in safe-call.
>   in virtual ctrl_iface_impl::~ctrl_iface_impl()
>   at rfnoc/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
> this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
>   in typename T::sptr e300_transport::get_buff(double) [with T =
> uhd::transport::managed_send_buffer; typename T::sptr =
> boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
>   at rfnoc/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257
>
> [ERROR] [UHD] Exception caught in safe-call.
>   in virtual ctrl_iface_impl::~ctrl_iface_impl()
>   at rfnoc/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
> this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
>   in typename T::sptr e300_transport::get_buff(double) [with T =
> uhd::transport::managed_send_buffer; typename T::sptr =
> boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
>   at rfnoc/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257
>
> [ERROR] [UHD] Exception caught in safe-call.
>   in virtual ctrl_iface_impl::~ctrl_iface_impl()
>   at rfnoc/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76
> this->peek32(0); -> AssertionError: (sts >> 7) & 0x1
>   in typename T::sptr e300_transport::get_buff(double) [with T =
> uhd::transport::managed_send_buffer; typename T::sptr =
> boost::intrusive_ptr<uhd::transport::managed_send_buffer>]
>   at rfnoc/src/uhd/host/lib/usrp/e300/e300_fifo_config.cpp:257
>
> Thanks
> Kailash
>
>
> _______________________________________________
> USRP-users mailing list
> USRP-users@lists.ettus.com
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>
>
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