Hi Mark. One thought-- Vivado does not support the Spartan-3A FPGA on the USRP N210. The JTAG protocol should in principal be the same, but Vivado definitely does not include Xilinx device files for older FPGAs.
Have you tried to resurrect the device using Xilinx ISE 14.7 Labtools? https://www.xilinx.com/member/forms/download/xef.html?filename=Xilinx_LabTools_14.7_1015_1.tar&akdm=1 If that fails, please report back and we will try to assist you further. -Robin On Tue, Oct 31, 2017 at 1:46 PM, Marcus D. Leech via USRP-users < usrp-users@lists.ettus.com> wrote: > On 10/31/2017 04:21 PM, Mark Koenig via USRP-users wrote: > > Again, > > > > Looking to see if anyone can help on this. > > > > One more detail is that I am unable to reboot the N210 into safe mode, > thus no green lights come on. > > > > Thanks > > > > Mark > > OK, so you've followed the JTAG-based procedures here > > https://kb.ettus.com/N200/N210_Device_Recovery > > ANd still cannot get it to "go" ? > > > > > *From: *Mark Koenig <mark.koe...@iubelttechnologies.com> > <mark.koe...@iubelttechnologies.com> > *Date: *Thursday, October 26, 2017 at 1:25 PM > *To: *"usrp-users@lists.ettus.com" <usrp-users@lists.ettus.com> > <usrp-users@lists.ettus.com> <usrp-users@lists.ettus.com> > *Subject: *Re: Reprogramming a "Bricked" N210 > > > > Just bringing this back to the top. > > > > *From: *Mark Koenig <mark.koe...@iubelttechnologies.com> > <mark.koe...@iubelttechnologies.com> > *Date: *Monday, October 23, 2017 at 2:26 PM > *To: *"usrp-users@lists.ettus.com" <usrp-users@lists.ettus.com> > <usrp-users@lists.ettus.com> <usrp-users@lists.ettus.com> > *Subject: *Reprogramming a "Bricked" N210 > > > > I have been trying to use Vivado lab to return my N210 to a useable state > and am looking for some help. > > > > I see the green light lit on the Xilinx USB to JTAG adaptor and the > connection seems good, however, I keep getting errors during the > programming of the EE_PROM. Below is what I constantly see when trying to > reprogram the N210. > > > > Any help would be greatly appreciated. > > > > Thank you > > > > Mark > > > > > > > > > > set_property PROBES.FILE {} [lindex [get_hw_devices] 0] > > set_property PROGRAM.FILE {/usr/local/share/uhd/images/usrp2_fpga.bin} > [lindex [get_hw_devices] 0] > > program_hw_devices [lindex [get_hw_devices] 0] > > ERROR: [Labtools 27-3165] End of startup status: LOW > > ERROR: [Common 17-39] 'program_hw_devices' failed due to earlier errors. > > > > > > > > > > _______________________________________________ > USRP-users mailing > listUSRP-users@lists.ettus.comhttp://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > > > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > >
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