Hello Everyone,
We are building a custom FPGA image using RFNoC targeting the x310 platform.
We are currently running out of FPGA resources and are looking for ways to slim
the base image down. We are not using the PCIe interface and it looks like the
PCIe IP (x300_pcie_int and LvFpga_Chinch_Interface) use a non trivial amount of
resources. I was looking into removing these IP blocks but it appears that the
schematics for the x310 (https://files.ettus.com/schematics/x300/x3xx.pdf
<https://files.ettus.com/schematics/x300/x3xx.pdf>) omits the pages pertaining
to the PCIe interface and the NI DAQ-STC3-BG chip. I would like to avoid
damaging any of the hardware and was wondering if anyone knows how to properly
terminate the lines that would normally be connected to the PCIe IP? Does
anyone know of any hazards removing this IP? Is the proper initialization of
the DAQ-STC3-BG required for the x310 to operate correctly?
Thanks,
Chris Yarp
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