Hi Alex, You'll need to run uhd_images_downloader on the E3xx, and note the URL for the FPGA .zip file it is attempting to fetch within the output. Download that zip file on a computer that is connected to the internet, then transfer it to the E3xx, and unpack them, and you should then be able to pass the fpga= arg to the new FPGA image.
Regards, Nate Temple > On Sep 26, 2017, at 6:53 AM, Alex Young via USRP-users > <usrp-users@lists.ettus.com> wrote: > > I am trying to build an d run fosphor on my e310 (sg1) > > I used the getting started guide > (https://kb.ettus.com/Getting_Started_with_RFNoC_Development), successfully > built the block, and copied it over to the directory ~/rfnoc on the e310. > When I run this command: > > $ uhd_usrp_probe --args="fpga=/home/root/rfnoc/usrp_e310_fpga_RFNOC.bit" > > I get: > > >>> > linux; GNU C++ version 5.2.0; Boost_105800; UHD_003.010.001.001-release > > -- Loading FPGA image: /home/root/rfnoc/usrp_e310_fpga_RFNOC.bit... done > -- Detecting internal GPSDO .... found > -- Initializing core control... > -- Performing register loopback test... pass > Error: RuntimeError: Expected FPGA compatibility number 16.x, but got 255.0: > The FPGA build is not compatible with the host code build. > Please run: > > "/usr/lib/uhd/utils/uhd_images_downloader.py" > >>> > > So I run > > $ /usr/lib/uhd/utils/uhd_images_downloader.py > > and try it to load the bit file again, with the same results. > > Anyone know what I need to do? > > -Thanks, > Alex Young > > -- > Alexander Young > Senior Systems Engineer | Echo Ridge, LLC > alex.yo...@echoridgenet.com | 703.437.0404 > > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com _______________________________________________ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
