Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare
to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at
SoC level.
Signed-off-by: Benoît Thébaudeau <benoit.thebaud...@advansee.com>
Cc: Marek Vasut <ma...@denx.de>
Cc: Stefano Babic <sba...@denx.de>
---
Changes for v2: None.
.../arch/arm/include/asm/arch-mx25/imx-regs.h | 1 +
.../arch/arm/include/asm/arch-mx31/imx-regs.h | 1 +
.../drivers/usb/host/ehci-mxc.c | 2 +-
3 files changed, 3 insertions(+), 1 deletion(-)
diff --git u-boot-usb-76454b2.orig/arch/arm/include/asm/arch-mx25/imx-regs.h
u-boot-usb-76454b2/arch/arm/include/asm/arch-mx25/imx-regs.h
index e780296..c1bc4bc 100644
--- u-boot-usb-76454b2.orig/arch/arm/include/asm/arch-mx25/imx-regs.h
+++ u-boot-usb-76454b2/arch/arm/include/asm/arch-mx25/imx-regs.h
@@ -246,6 +246,7 @@ struct aips_regs {
#define IMX_RTIC_BASE (0x53FEC000)
#define IMX_IIM_BASE (0x53FF0000)
#define IMX_USB_BASE (0x53FF4000)
+#define IMX_USB_PORT_OFFSET 0x200
#define IMX_CSI_BASE (0x53FF8000)
#define IMX_DRYICE_BASE (0x53FFC000)
diff --git u-boot-usb-76454b2.orig/arch/arm/include/asm/arch-mx31/imx-regs.h
u-boot-usb-76454b2/arch/arm/include/asm/arch-mx31/imx-regs.h
index 01a849d..ae3658b 100644
--- u-boot-usb-76454b2.orig/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ u-boot-usb-76454b2/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -895,6 +895,7 @@ struct esdc_regs {
#define MX31_AIPS1_BASE_ADDR 0x43f00000
#define IMX_USB_BASE (MX31_AIPS1_BASE_ADDR + 0x88000)
+#define IMX_USB_PORT_OFFSET 0x200
/*
* CSPI register definitions
diff --git u-boot-usb-76454b2.orig/drivers/usb/host/ehci-mxc.c
u-boot-usb-76454b2/drivers/usb/host/ehci-mxc.c
index 711c4a7..cd09462 100644
--- u-boot-usb-76454b2.orig/drivers/usb/host/ehci-mxc.c
+++ u-boot-usb-76454b2/drivers/usb/host/ehci-mxc.c
@@ -168,7 +168,7 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr,
struct ehci_hcor **hcor)
udelay(80);
ehci = (struct usb_ehci *)(IMX_USB_BASE +
- (0x200 * CONFIG_MXC_USB_PORT));
+ IMX_USB_PORT_OFFSET * CONFIG_MXC_USB_PORT);
*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
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