On 09/14/2012 06:03 AM, Joe Hershberger wrote:
Hi Michal,
On Thu, Aug 16, 2012 at 1:30 AM, Michal Simek <mon...@monstr.eu> wrote:
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek <mon...@monstr.eu>
---
v2: Forget to also add config file
v3: Change name for serial driver
Remove lowlevel_init from board folder
Remove XPSS part from timer baseaddr
Change name for Zynq gem driver
Clean coding style
Remove mac + ip addresses from config file
Remove additional PHYs
---
board/xilinx/zynq/Makefile | 54 +++++++++++++++++++++
board/xilinx/zynq/board.c | 64 +++++++++++++++++++++++++
boards.cfg | 1 +
include/configs/zynq.h | 110 ++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 229 insertions(+), 0 deletions(-)
create mode 100644 board/xilinx/zynq/Makefile
create mode 100644 board/xilinx/zynq/board.c
create mode 100644 include/configs/zynq.h
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
new file mode 100644
index 0000000..4cb36f6
--- /dev/null
+++ b/board/xilinx/zynq/board.c
@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2012 Michal Simek <mon...@monstr.eu>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <netdev.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ icache_enable();
+
+ return 0;
+}
+
+int board_late_init(void)
+{
+ return 0;
+}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int ret = 0;
+
+#if defined(CONFIG_ZYNQ_GEM) && defined(CONFIG_ZYNQ_GEM_BASEADDR0)
+ ret |= zynq_gem_initialize(bis, CONFIG_ZYNQ_GEM_BASEADDR0);
+#endif
+
+ return ret;
+}
+#endif
+
+int dram_init(void)
+{
+ gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+
+ return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+ while (1)
+ ;
+}
Why not explicitly reset, like Xilinx tree?
void reset_cpu(ulong addr)
{
/* unlock SLCR */
writel(XPSS_SLCR_UNLOCK_KEY, XPSS_SYS_CTRL_BASEADDR |
XPSS_SLCR_UNLOCK);
/* Tickle soft reset bit */
writel(1, XPSS_SYS_CTRL_BASEADDR | XPSS_SLCR_PSS_RST_CTRL);
while (1)
;
}
I haven't started to merge all these features and want to merge minimum platform
and then start to clean drivers and features.
Maybe for slcr make sense to create driver and not just unlock it and use
it for code.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
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