Scott Wood <scottw...@freescale.com> wrote on 2012/04/25 20:43:22: > > On 04/25/2012 05:57 AM, Joakim Tjernlund wrote: > >> > >> Debugging of e500 and e500v1 processer requires MSR[DE] bit to be set > >> always. > >> Where MSR = Machine State register > >> > >> Make sure of MSR[DE] bit is set uniformaly across the different execution > >> address space i.e. AS0 and AS1. > > > > Hi > > > > We are trying to bring up our custom P2010 RDB based board. boot is NOR > > based and we cannot get past the rfi below. > > lis r6,MSR_IS|MSR_DS@h > > ori r6,r6,MSR_IS|MSR_DS@l > > lis r7,switch_as@h > > ori r7,r7,switch_as@l > > > > mtspr SPRN_SRR0,r7 > > mtspr SPRN_SRR1,r6 > > rfi > > > > switch_as: > > > > We end up with a TLB exception no matter what we do, even after applying > > this patch. > > Did you apply the entire patchset, and define CONFIG_SYS_PPC_E500_DEBUG_TLB?
No, but this code is executed before any of the other parts of the patch. Anyhow, I just found the problem(really obvious once I found it). During bring up we had to load uboot in the middle of the flash instead of the end because we have a flash burn problem in the end of the flash that we do not understand yet. We think it may be related to DDR3 being misconfigured by the emulator(BDI3000). I do not understand why this emulator can not use the L2SRAM instead? Is there something magic behind the L2SRAM so it is impossible to use it as a work area for flash burning? Jocke _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
