Setup mx31 AIPS registers.

It was verified on a mx31pdk that without the AIPS settings it is not possible
to run audio playback.

Signed-off-by: Fabio Estevam <fabio.este...@freescale.com>
---
Changes since v1:
- Use CONFIG_ARCH_CPU_INIT
- Zero-out the 8 MSB of opacr4
- Confirmed that audio playback does work

 arch/arm/cpu/arm1136/mx31/generic.c       |   46 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-mx31/imx-regs.h |   13 ++++++++
 include/configs/mx31pdk.h                 |    1 +
 3 files changed, 60 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/arm1136/mx31/generic.c 
b/arch/arm/cpu/arm1136/mx31/generic.c
index d60afc9..a401c9a 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -228,3 +228,49 @@ int print_cpuinfo(void)
        return 0;
 }
 #endif
+
+#ifdef CONFIG_ARCH_CPU_INIT
+void init_aips(void)
+{
+       struct aipstz_regs *aips1, *aips2;
+       unsigned int reg;
+
+       aips1 = (struct aipstz_regs *)MX31_AIPS1_BASE_ADDR;
+       aips2 = (struct aipstz_regs *)MX31_AIPS2_BASE_ADDR;
+
+       /*
+        * Set all MPROTx to be non-bufferable, trusted for R/W,
+        * not forced to user-mode.
+        */
+       writel(0x77777777, &aips1->mprot0);
+       writel(0x77777777, &aips1->mprot1);
+       writel(0x77777777, &aips2->mprot0);
+       writel(0x77777777, &aips2->mprot1);
+
+       /*
+        * Set all OPACRx to be non-bufferable, not require
+        * supervisor privilege level for access, allow for
+        * write access and untrusted master access.
+        */
+       writel(0x0, &aips1->opacr0);
+       writel(0x0, &aips1->opacr1);
+       writel(0x0, &aips1->opacr2);
+       writel(0x0, &aips1->opacr3);
+       reg = readl(&aips1->opacr4) & 0x00FFFFFF;
+       writel(reg, &aips1->opacr4);
+
+       writel(0x0, &aips2->opacr0);
+       writel(0x0, &aips2->opacr1);
+       writel(0x0, &aips2->opacr2);
+       writel(0x0, &aips2->opacr3);
+       reg = readl(&aips2->opacr4) & 0x00FFFFFF;
+       writel(reg, &aips2->opacr4);
+}
+
+int arch_cpu_init(void)
+{
+       init_aips();
+
+       return 0;
+}
+#endif
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h 
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 6454acb..11069af 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -539,6 +539,18 @@ struct esdc_regs {
        u32 dlyl;
 };
 
+/* AIPS registers */
+struct aipstz_regs {
+       u32     mprot0;
+       u32     mprot1;
+       u32     rsvd[0xe];
+       u32     opacr0;
+       u32     opacr1;
+       u32     opacr2;
+       u32     opacr3;
+       u32     opacr4;
+};
+
 #endif
 
 #define __REG(x)     (*((volatile u32 *)(x)))
@@ -873,6 +885,7 @@ struct esdc_regs {
 #define IRAM_SIZE      (16 * 1024)
 
 #define MX31_AIPS1_BASE_ADDR   0x43f00000
+#define MX31_AIPS2_BASE_ADDR   0x53f00000
 #define IMX_USB_BASE           (MX31_AIPS1_BASE_ADDR + 0x88000)
 
 /* USB portsc */
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 4da6020..623b1f7 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -40,6 +40,7 @@
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_ARCH_CPU_INIT
 
 #define CONFIG_CMDLINE_TAG                     /* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS
-- 
1.7.1

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