Hi Graeme,
On Mon, Feb 27, 2012 at 12:12 PM, Graeme Russ <graeme.r...@gmail.com> wrote:
> Hi Asif,
>
> On 02/27/2012 05:26 PM, Asif Sulikeri wrote:
> > >> And the increase of 100kB is massive - are you sure you are
> > compiling with
> > >> the same set of options defined in the board config file? If you
> are
> > sure,
> > >> then it would be interesting to find out what has caused it.
> >
> >
> > I am compiling with the default options, with no additional changes made
> to
> > the conf file, the 1.3.4 version used to give me 150kB binary as compared
> > to the 252kB binary generated by the 2010.06 version.
>
> Ah - Looks like some more options have crept into the default configuration
> - Can you send the two board config files (as inline text, not attachments)
> so I can compare?
>
>
Here's the exact contents of the config
file:*u-boot/include/configs/davinci_dm365_ipnc.h
* u-boot version: *1.3.4*
#ifndef __CONFIG_H
#define __CONFIG_H
#include <asm/sizes.h>
/*=======*/
/* Board */
/*=======*/
#define CFG_DM365_IPNC
#define CFG_USE_NAND
//ANR - Use old layout
//#define CFG_DAVINCI_STD_NAND_LAYOUT
#define CONFIG_ENV_OVERWRITE
/*===================*/
/* SoC Configuration */
/*===================*/
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */
#define CFG_TIMERBASE 0x01C21400 /* use timer 0 */
#define CFG_HZ_CLOCK 24000000 /* Timer Input clock freq */
#define CFG_HZ 1000
/*=============*/
/* Memory Info */
/*=============*/
#define CFG_MALLOC_LEN (0x40000 + 128*1024) /* malloc () len */
#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */
#define CFG_MEMTEST_START 0x82000000 /* memtest start address */
#define CFG_MEMTEST_END 0x90000000 /* 16MB RAM test */
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define CONFIG_STACKSIZE (256*1024) /* regular stack */
#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
#define PHYS_SDRAM_1_SIZE 0x8000000 /* DDR size 128MB */
/*====================*/
/* Serial Driver info */
/*====================*/
#define CFG_NS16550
#define CFG_NS16550_SERIAL
#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */
#define CFG_NS16550_COM1 0x01C20000 /* Base address of UART0 */
#define CFG_NS16550_COM2 0x01D06000 /* Base address of UART0 */
#define CFG_NS16550_CLK 121500000 /* Input clock to NS16550 */
#define CONFIG_CONS_INDEX 2 /* use UART0 for console */
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*===================*/
/* I2C Configuration */
/*===================*/
#define CONFIG_HARD_I2C
#define CONFIG_DRIVER_DAVINCI_I2C
#define CFG_I2C_SPEED 100000 /* 100Kbps */
#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
/*====================================================*/
#define CFG_I2C_EEPROM_ADDR_LEN 2
#define CFG_I2C_EEPROM_ADDR 0x50
#define CFG_EEPROM_PAGE_WRITE_BITS 6
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
/*==================================*/
/* Network & Ethernet Configuration */
/*==================================*/
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
/*=====================*/
/* Flash & Environment */
/*=====================*/
#ifdef CFG_USE_NAND
#undef CFG_ENV_IS_IN_FLASH
#define CFG_NO_FLASH
#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
#define CFG_ENV_SECT_SIZE 0x4000 /* Env sector Size */
#define CFG_ENV_SIZE SZ_16K
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
#define CFG_NAND_BASE 0x02000000
#define CFG_NAND_4BIT_ECC
#define CFG_NAND_HW_ECC
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define CFG_ENV_OFFSET 0x6c000 /* environment starts here */
#define CFG_NAND_BASE_LIST {CFG_NAND_BASE, CFG_NAND_BASE+0x4000}
#endif
/*==============================*/
/* U-Boot general configuration */
/*==============================*/
#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
#define CONFIG_MISC_INIT_R
#define CONFIG_BOOTDELAY 4
#define CONFIG_BOOTFILE "uImage" /* Boot file name */
#define CFG_PROMPT "DM365 IPNC :>" /* Monitor Command Prompt */
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT) + 16) /* Print
buffer sz */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_LOAD_ADDR 0x80700000 /* default Linux kernel load
address */
#define CONFIG_VERSION_VARIABLE
#define CONFIG_CMDLINE_EDITING
#define CONFIG_IDENT_STRING " DM365-IPNC-1.0.1"
/*============= Defined by AsifIqbal Sulikeri to enable HUSH shell ======*/
#ifdef HUSH_ENABLE
#define CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "=> "
#undef CONFIG_BOOT_RETRY_TIME
#undef CONFIG_RESET_TO_RETRY
#define CONFIG_AUTOSCRIPT 1
#define CONFIG_CMD_AUTOSCRIPT
#endif
/*========================================================*/
/*===================*/
/* Linux Information */
/*===================*/
#define LINUX_BOOT_PARAM_ADDR 0x80000100
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTARGS "mem=60M console=ttyS1,115200n8
root=/dev/ram0 rw initrd=0x82000000,11M ip=192.168.1.168:192
.168.1.100:192.168.1.1:255.255.255.0:::off eth=$(ethaddr)"
#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs)
video=dm36x:output=\\$(videostd);run setboot; bootm 0x2050000"
/*=================*/
/* U-Boot commands */
/*=================*/
#include <config_cmd_default.h>
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
#undef CONFIG_CMD_EEPROM
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_NAND
#define CONFIG_CMD_JFFS2
/* KGDB support (if any) */
/*=======================*/
#ifdef CONFIG_CMD_KGDB
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port
*/
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
#endif
#endif /* __CONFIG_H */
and the contents of:
*u-boot-2010.06/include/configs/davinci_dm365evm.h *u-boot version:
*2010.06*
#ifndef __CONFIG_H
#define __CONFIG_H
/* Spectrum Digital TMS320DM365 EVM board */
#define DAVINCI_DM365EVM
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
#define CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
#define CONFIG_SYS_CONSOLE_INFO_QUIET
/* SoC Configuration */
#define CONFIG_ARM926EJS /* arm926ejs CPU */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM365
/* Memory Info */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
/* Serial Driver info: UART0 for console */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE -4
#define CONFIG_SYS_NS16550_COM1 0x01c20000
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
/* EEPROM definitions for EEPROM on DM365 EVM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
/* Network Configuration */
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_NET_MULTI
/* I2C */
#define CONFIG_HARD_I2C
#define CONFIG_DRIVER_DAVINCI_I2C
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
/* NAND: socketed, two chipselects, normally 2 GBytes */
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS 2
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
/* socket has two chipselects, nCE0 gated by address BIT(14) */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_MAX_CHIPS 2
#define PINMUX4_USBDRVBUS_BITCLEAR 0x3000
#define PINMUX4_USBDRVBUS_BITSET 0x2000
/* USB Configuration */
#define CONFIG_USB_DAVINCI
#define CONFIG_MUSB_HCD
#ifdef CONFIG_USB_DAVINCI
#define CONFIG_CMD_USB /* include support for usb */
#define CONFIG_CMD_STORAGE /* include support for usb */
#define CONFIG_CMD_FAT /* include support for FAT/storage*/
#define CONFIG_DOS_PARTITION /* include support for FAT/storage*/
#endif
#ifdef CONFIG_MUSB_HCD /* include support for usb host */
#define CONFIG_CMD_USB /* include support for usb cmd */
#define CONFIG_USB_STORAGE /* MSC class support */
#define CONFIG_CMD_STORAGE /* inclue support for usb-storage cmd */
#define CONFIG_CMD_FAT /* inclue support for FAT/storage */
#define CONFIG_DOS_PARTITION /* inclue support for FAT/storage */
#ifdef CONFIG_USB_KEYBOARD /* HID class support */
#define CONFIG_SYS_USB_EVENT_POLL
#define CONFIG_PREBOOT "usb start"
#endif /* CONFIG_USB_KEYBOARD */
#endif /* CONFIG_MUSB_HCD */
#ifdef CONFIG_MUSB_UDC
#define CONFIG_USB_DEVICE 1
#define CONFIG_USB_TTY 1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
#define CONFIG_USBD_VENDORID 0x0451
#define CONFIG_USBD_PRODUCTID 0x5678
#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
#define CONFIG_USBD_PRODUCT_NAME "DM365VM"
#endif /* CONFIG_MUSB_UDC */
/* U-Boot command configuration */
#include <config_cmd_default.h>
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_I2C
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
#ifdef CONFIG_NAND_DAVINCI
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define CONFIG_CMD_NAND
#define CONFIG_CMD_UBI
#define CONFIG_RBTREE
#endif
#define CONFIG_CRC32_VERIFY
#define CONFIG_MX_CYCLIC
/* U-Boot general configuration */
#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
#define CONFIG_BOOTFILE "uImage" /* Boot file name */
#define CONFIG_SYS_PROMPT "DM365 EVM # " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE /* Print buffer size */ \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_LONGHELP
#ifdef CONFIG_NAND_DAVINCI
#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET 0x3C0000
#undef CONFIG_ENV_IS_IN_FLASH
#endif
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTCOMMAND \
"dhcp;bootm"
#define CONFIG_BOOTARGS \
"console=ttyS0,115200n8 " \
"root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
#define CONFIG_CMDLINE_EDITING
#define CONFIG_VERSION_VARIABLE
#define CONFIG_TIMESTAMP
/* U-Boot memory configuration */
#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */
#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
/* Linux interfacing */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
/* NAND configuration issocketed with two chipselects just like the DM355
EVM.
* It normally comes with a 2GByte SLC part with 2KB pages
* (and 128KB erase blocks); other
* 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
* pretty much demands the 4-bit ECC support.) You can of course swap in
* other parts, including small page ones.
*/
#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
#ifdef CONFIG_SYS_NAND_LARGEPAGE
/* Use same layout for 128K/256K blocks; allow some bad blocks */
#define PART_BOOT "2m(bootloader)ro,"
#else
/* Assume 16K erase blocks; allow a few bad ones. */
#define PART_BOOT "512k(bootloader)ro,"
#endif
#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
#define PART_REST "-(filesystem)"
#define MTDPARTS_DEFAULT \
"mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
#endif /* __CONFIG_H */
Regards,
Asif
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