The CPUNum field in the Ebase register contains an unique identifier for each CPU. This helps to distinguish between CPU cores in multi-processor systems.
Signed-off-by: Daniel Schwierzeck <daniel.schwierz...@googlemail.com> --- arch/mips/include/asm/mipsregs.h | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index be7e5c6..15a9fd5 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -89,6 +89,13 @@ #define CP0_DWATCH $19 /* + * Additional Coprocessor 0 register names. + * These registers are listed for completeness and are intended + * for usage in assembly code. + */ +#define CP0_EBASE $15,1 + +/* * Coprocessor 0 Set 1 register names */ #define CP0_S1_DERRADDR0 $26 @@ -395,6 +402,12 @@ #define CAUSEF_BD (_ULCAST_(1) << 31) /* + * Bits in the coprocessor 0 EBase register. + */ +#define EBASEB_CPUNUM 0 +#define EBASEF_CPUNUM (_ULCAST_(1023)) + +/* * Bits in the coprocessor 0 config register. */ /* Generic bits. */ -- 1.7.7.2 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
