Hello Christian,
Christian Riesch wrote:
> Hello Heiko,
> thanks for your reply.
>
> On Fri, Sep 30, 2011 at 10:46 AM, Heiko Schocher <h...@denx.de> wrote:
>> Christian Riesch wrote:
>>> On Mon, Sep 19, 2011 at 7:50 AM, Heiko Schocher <h...@denx.de> wrote:
>>>> - booting from NOR Flash with direct boot method
>>>> - POST support
>>>> - LOGBUF support
>>>>
>>>> Signed-off-by: Heiko Schocher <h...@denx.de>
>>>> Cc: Paulraj Sandeep <s-paul...@ti.com>
>>>> Cc: Albert ARIBAUD <albert.u.b...@aribaud.net>
>>>> Cc: Igor Grinberg <grinb...@compulab.co.il>
>>>> ---
>>>> - changes for v2
>>>> - use CONFIG_MACH_TYPE instead setting the MACH_TYPE in
>>>> board specific code, as Igor Grinberg suggested.
>>>> - add logversion=2 to default Environment
[...]
>> #define CONFIG_SYS_AM1808_PLL0_POSTDIV 1
>>
>> So the correct calculation is:
>>
>> (24MHz / PREDIV * (CONFIG_SYS_AM1808_PLL0_PLLM + 1)) / POSTDIV
>>
>> (And with that, I get 456 MHz ;-)
>
> But then you would be running PLL0 with 24MHz *
> (CONFIG_SYS_AM1808_PLL0_PLLM + 1) = 912 MHz !? That would be out of
> specs since the PLL output frequency must be between 300 and 600 MHz
> according to the datasheet.
Yep, you are right! Fixed
CONFIG_SYS_AM1808_PLL0_PLLM to 18
CONFIG_SYS_AM1808_PLL0_POSTDIV to 0
Thanks!
> However, you can't set the PLLM to 37 anyway, since it's only a 5 bit
> field, (37 & 0x1f) results in 5, so you only multiply the frequency by
> 6 in the PLL, resulting in 144MHz PLL frequency.
Hmm... you are right here also, but I see:
=> md 1c11100
01c11100: 00000049 00000014 00020000 00000000 I...............
01c11110: 00000025 00008000 00008000 00008001 %...............
^
Pllm
strange ...
Thanks for this review!
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
