MDSTAT.STATE occupies bits 0..5 according to all available documentation, so fix the masks which previously was leaving out the intermediate state indicator bit.
Signed-off-by: Sergei Shtylyov <sshtyl...@ru.mvista.com> --- Resending with the corrected subject/description... Analogous Linux patch has been queued in the linux-davinci tree: http://linux.davincidsp.com/pipermail/davinci-linux-open-source/2011-July/023075.html arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S | 6 +++--- arch/arm/cpu/arm926ejs/davinci/psc.c | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) Index: u-boot/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S =================================================================== --- u-boot.orig/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S +++ u-boot/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S @@ -268,7 +268,7 @@ checkStatClkStop: checkDDRStatClkStop: ldr r6, MDSTAT_DDR2 ldr r7, [r6] - and r7, r7, $0x1f + and r7, r7, $0x3f cmp r7, $0x03 bne checkDDRStatClkStop @@ -343,7 +343,7 @@ checkStatClkStop2: checkDDRStatClkStop2: ldr r6, MDSTAT_DDR2 ldr r7, [r6] - and r7, r7, $0x1f + and r7, r7, $0x3f cmp r7, $0x01 bne checkDDRStatClkStop2 @@ -374,7 +374,7 @@ checkStatClkEn2: checkDDRStatClkEn2: ldr r6, MDSTAT_DDR2 ldr r7, [r6] - and r7, r7, $0x1f + and r7, r7, $0x3f cmp r7, $0x03 bne checkDDRStatClkEn2 Index: u-boot/arch/arm/cpu/arm926ejs/davinci/psc.c =================================================================== --- u-boot.orig/arch/arm/cpu/arm926ejs/davinci/psc.c +++ u-boot/arch/arm/cpu/arm926ejs/davinci/psc.c @@ -83,7 +83,7 @@ void lpsc_on(unsigned int id) while (readl(ptstat) & 0x01) continue; - if ((readl(mdstat) & 0x1f) == 0x03) + if ((readl(mdstat) & 0x3f) == 0x03) return; /* Already on and enabled */ writel(readl(mdctl) | 0x03, mdctl); @@ -114,7 +114,7 @@ void lpsc_on(unsigned int id) while (readl(ptstat) & 0x01) continue; - while ((readl(mdstat) & 0x1f) != 0x03) + while ((readl(mdstat) & 0x3f) != 0x03) continue; } _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
