> -----邮件原件----- > 发件人: Marek Vasut <[email protected]> > 发送时间: 2025年11月30日 9:05 > 收件人: Alice Guo (OSS) <[email protected]>; [email protected]; > dl-uboot-imx <[email protected]> > 抄送: Marek Vasut <[email protected]>; Marek Vasut > <[email protected]>; Tom Rini <[email protected]>; Ye Li > <[email protected]>; Fabio Estevam <[email protected]>; > [email protected]; Mattijs Korpershoek <[email protected]>; > Patrice Chotard <[email protected]>; Stefano Babic > <[email protected]>; Peng Fan <[email protected]>; Lukasz Majewski > <[email protected]>; Simon Glass <[email protected]>; David Zang > <[email protected]>; Alice Guo <[email protected]> > 主题: Re: [PATCH v1 1/4] ehci-mx6: Add powerup_fixup implementation > > On 11/28/25 2:16 PM, [email protected] wrote: > > From: Ye Li <[email protected]> > > > > When doing port reset, the PR bit of PORTSC1 will be automatically > > cleared by our IP, but standard EHCI needs explicit clear by software. > > The EHCI-HCD driver follow the EHCI specification, so after 50ms wait, > > it clear the PR bit by writting to the PORTSC1 register with value > > loaded before setting PR. > > > > This sequence is ok for our IP when the delay time is exact. But when > > the timer is slower > > How can the timer be slower ? Maybe there is some bug somewhere else ?
On i.MX8ULP, the A35 system counter uses the internal LPO. The trimmed frequency of the LPO is not as accurate as an external oscillator. Best regards, Alice Guo
