From: Alice Guo <[email protected]> Update the i.MX8ULP EVK device tree files and defconfig to enable the second USB controller (base address 0x29920000) on i.MX8ULP EVK in host mode.
Signed-off-by: Alice Guo <[email protected]> --- arch/arm/dts/imx8ulp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8ulp-evk.dts | 27 +++++++++++++++++++++++++++ arch/arm/dts/imx8ulp.dtsi | 30 ++++++++++++++++++++++++++++++ configs/imx8ulp_evk_defconfig | 3 +++ 4 files changed, 64 insertions(+) diff --git a/arch/arm/dts/imx8ulp-evk-u-boot.dtsi b/arch/arm/dts/imx8ulp-evk-u-boot.dtsi index 2782dc7dd75..e35886c9e96 100644 --- a/arch/arm/dts/imx8ulp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8ulp-evk-u-boot.dtsi @@ -38,6 +38,10 @@ bootph-all; }; +&usbotg2 { + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx27-usb"; +}; + &usdhc0 { bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8ulp-evk.dts b/arch/arm/dts/imx8ulp-evk.dts index 7aec1706382..fb28748ec17 100644 --- a/arch/arm/dts/imx8ulp-evk.dts +++ b/arch/arm/dts/imx8ulp-evk.dts @@ -44,6 +44,26 @@ status = "okay"; }; +&usbotg2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_otgid2>; + pinctrl-1 = <&pinctrl_otgid2>; + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + over-current-active-low; + status = "okay"; +}; + +&usbphy2 { + status = "okay"; +}; + +&usbmisc2 { + status = "okay"; +}; + &usdhc0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_usdhc0>; @@ -103,6 +123,13 @@ >; }; + pinctrl_otgid2: usb2grp { + fsl,pins = < + MX8ULP_PAD_PTD23__USB1_ID 0x10003 + MX8ULP_PAD_PTF6__USB1_OC 0x10003 + >; + }; + pinctrl_usdhc0: usdhc0grp { fsl,pins = < MX8ULP_PAD_PTD1__SDHC0_CMD 0x43 diff --git a/arch/arm/dts/imx8ulp.dtsi b/arch/arm/dts/imx8ulp.dtsi index 06ce5f19aa8..54d5e1f8644 100644 --- a/arch/arm/dts/imx8ulp.dtsi +++ b/arch/arm/dts/imx8ulp.dtsi @@ -399,6 +399,36 @@ status = "disabled"; }; + usbotg2: usb@29920000 { + compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb"; + reg = <0x29920000 0x200>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pcc4 IMX8ULP_CLK_USB1>; + power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>; + phys = <&usbphy2>; + fsl,usbmisc = <&usbmisc2 0>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x8>; + rx-burst-size-dword = <0x8>; + status = "disabled"; + }; + + usbmisc2: usbmisc@29920200 { + compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7ulp-usbmisc"; + #index-cells = <1>; + reg = <0x29920200 0x200>; + status = "disabled"; + }; + + usbphy2: usb-phy@29930000 { + compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy"; + reg = <0x29930000 0x10000>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pcc4 IMX8ULP_CLK_USB1_PHY>; + #phy-cells = <0>; + status = "disabled"; + }; + fec: ethernet@29950000 { compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec"; reg = <0x29950000 0x10000>; diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index e750b3d9ae0..11031c4d12c 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -54,6 +54,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_READ=y +CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y @@ -92,4 +93,6 @@ CONFIG_FSL_LPUART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_NXP_FSPI=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y CONFIG_ULP_WATCHDOG=y -- 2.43.0
