Use fixed seq 0 and 1 for enetc PCI buses, then the seq for PCI controllers
could start after them.

Signed-off-by: Ye Li <ye...@nxp.com>
---
 arch/arm/dts/imx95-19x19-evk-u-boot.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi 
b/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi
index 2d1f02baa5f6..8b59831b7ca0 100644
--- a/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi
@@ -5,6 +5,13 @@
 
 #include "imx95-u-boot.dtsi"
 
+/ {
+       aliases {
+               pci0 = &netc_bus0;
+               pci1 = &netc_bus1;
+       };
+};
+
 &lpuart1 {
        bootph-pre-ram;
 };
-- 
2.7.4

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