On 5/12/25 18:44, Marek Vasut wrote:
> The STM32MP13xx has only 128 kiB of SYSRAM starting at address 0x2ffe0000 .
> The STM32MP15xx has 256 kiB of SYSRAM starting at address 0x2ffc0000 . Make
> sure both SoCs configure ARMV7_SECURE_BASE correctly . Define the SYSRAM
> base in stm32.h to be consistent with the STM32MP15xx macro.
> 
> Signed-off-by: Marek Vasut <marek.va...@mailbox.org>
> ---
> Cc: Patrice Chotard <patrice.chot...@foss.st.com>
> Cc: Patrick Delaunay <patrick.delau...@foss.st.com>
> Cc: Simon Glass <s...@chromium.org>
> Cc: Sughosh Ganu <sughosh.g...@linaro.org>
> Cc: Tom Rini <tr...@konsulko.com>
> Cc: u-boot@lists.denx.de
> Cc: uboot-st...@st-md-mailman.stormreply.com
> ---
>  arch/arm/cpu/armv7/Kconfig                 | 3 ++-
>  arch/arm/mach-stm32mp/include/mach/stm32.h | 5 +++++
>  2 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
> index 4eb34b7b449..ab86d642eee 100644
> --- a/arch/arm/cpu/armv7/Kconfig
> +++ b/arch/arm/cpu/armv7/Kconfig
> @@ -36,7 +36,8 @@ config ARMV7_SECURE_BASE
>       hex "Base address for secure mode memory"
>       depends on HAS_ARMV7_SECURE_BASE
>       default 0xfff00000 if TEGRA124
> -     default 0x2ffc0000 if ARCH_STM32MP
> +     default 0x2ffe0000 if STM32MP13X
> +     default 0x2ffc0000 if STM32MP15X
>       default 0x2f000000 if ARCH_MX7ULP
>       default 0x10010000 if ARCH_LS1021A
>       default 0x00900000 if ARCH_MX7
> diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h 
> b/arch/arm/mach-stm32mp/include/mach/stm32.h
> index a9ac49bc5d2..47b459b75d1 100644
> --- a/arch/arm/mach-stm32mp/include/mach/stm32.h
> +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
> @@ -110,6 +110,11 @@ enum forced_boot_mode {
>  #define STM32_SDMMC2_BASE            0x58007000
>  #define STM32_SDMMC3_BASE            0x48004000
>  
> +#ifdef CONFIG_STM32MP13X
> +#define STM32_SYSRAM_BASE            0x2FFE0000
> +#define STM32_SYSRAM_SIZE            SZ_128K
> +#endif
> +
>  #ifdef CONFIG_STM32MP15X
>  #define STM32_SYSRAM_BASE            0x2FFC0000
>  #define STM32_SYSRAM_SIZE            SZ_256K

Reviewed-by: Patrice Chotard <patrice.chot...@foss.st.com>

Thanks
Patrice

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